DS031 Datasheet, PDF (247/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 13: FF1517 BGA — XC2V4000, XC2V6000, and XC2V8000
Bank
Pin Description
Pin Number No Connect in the XC2V4000 No Connect in the XC2V6000
0
IO_L22P_0
A34
0
IO_L23N_0
K27
0
IO_L23P_0
K26
0
IO_L24N_0
F29
0
IO_L24P_0
F30
0
IO_L25N_0
B32
0
IO_L25P_0
B33
0
IO_L26N_0
L26
0
IO_L26P_0
L25
0
IO_L27N_0
G28
0
IO_L27P_0/VREF_0
G29
0
IO_L28N_0
C30
0
IO_L28P_0
C31
0
IO_L29N_0
J27
0
IO_L29P_0
J26
0
IO_L30N_0
D30
0
IO_L30P_0
D31
0
IO_L31N_0
A31
NC
0
IO_L31P_0
A32
NC
0
IO_L32N_0
H27
NC
0
IO_L32P_0
H26
NC
0
IO_L33N_0
F27
NC
0
IO_L33P_0/VREF_0
F28
NC
0
IO_L34N_0
B30
NC
0
IO_L34P_0
B31
NC
0
IO_L35N_0
M24
NC
0
IO_L35P_0
M23
NC
0
IO_L36N_0
D28
NC
0
IO_L36P_0
D29
NC
0
IO_L49N_0
C28
0
IO_L49P_0
C29
0
IO_L50N_0
K25
0
IO_L50P_0
L24
0
IO_L51N_0
E27
0
IO_L51P_0/VREF_0
E28
0
IO_L52N_0
A29
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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