DS031 Datasheet, PDF (157/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 9: BG575/BGG575 BGA — XC2V1000, XC2V1500, and XC2V2000
Bank
Pin Description
Pin Number No Connect in XC2V1000
7
IO_L46P_7
H2
7
IO_L46N_7
G2
7
IO_L45P_7/VREF_7
H3
7
IO_L45N_7
H4
7
IO_L43P_7
G3
7
IO_L43N_7
G4
7
IO_L24P_7
H5
7
IO_L24N_7
H6
7
IO_L22P_7
J6
7
IO_L22N_7
J7
7
IO_L21P_7/VREF_7
K7
7
IO_L21N_7
K8
7
IO_L19P_7
E1
7
IO_L19N_7
E2
7
IO_L06P_7
D2
7
IO_L06N_7
D3
7
IO_L04P_7
E3
7
IO_L04N_7
E4
7
IO_L03P_7/VREF_7
F4
7
IO_L03N_7
F5
7
IO_L02P_7/VRN_7
G5
7
IO_L02N_7/VRP_7
G6
7
IO_L01P_7
H7
7
IO_L01N_7
J8
No Connect in XC2V1500
0
VCCO_0
J12
0
VCCO_0
J11
0
VCCO_0
J10
0
VCCO_0
F11
0
VCCO_0
C6
0
VCCO_0
B11
1
VCCO_1
J15
1
VCCO_1
J14
1
VCCO_1
J13
1
VCCO_1
F14
1
VCCO_1
C19
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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