DS031 Datasheet, PDF (106/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 6: FG256/FGG256 BGA — XC2V40, XC2V80, XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
Pin Number No Connect in XC2V40
5
IO_L01P_5/CS_B
T3
No Connect in XC2V80
6
IO_L01P_6
P1
6
IO_L01N_6
N1
6
IO_L02P_6/VRN_6
N3
6
IO_L02N_6/VRP_6
N2
6
IO_L03P_6
M4
6
IO_L03N_6/VREF_6
M3
6
IO_L04P_6
M2
NC
6
IO_L04N_6
M1
NC
6
IO_L06P_6
L4
NC
6
IO_L06N_6
L3
NC
6
IO_L43P_6
L2
NC
NC
6
IO_L43N_6
L1
NC
NC
6
IO_L45P_6
L5
NC
NC
6
IO_L45N_6/VREF_6
K5
NC
NC
6
IO_L91P_6
K4
NC
6
IO_L91N_6
K3
NC
6
IO_L93P_6
K2
NC
6
IO_L93N_6/VREF_6
K1
NC
6
IO_L94P_6
J4
6
IO_L94N_6
J3
6
IO_L96P_6
J2
6
IO_L96N_6
J1
7
IO_L96P_7
H1
7
IO_L96N_7
H2
7
IO_L94P_7
H3
7
IO_L94N_7
H4
7
IO_L93P_7/VREF_7
G1
NC
7
IO_L93N_7
G2
NC
7
IO_L91P_7
G3
NC
7
IO_L91N_7
G4
NC
7
IO_L45P_7/VREF_7
G5
NC
NC
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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