DS031 Datasheet, PDF (136/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 8: FG676/FGG676 BGA — XC2V1500, XC2V2000, and XC2V3000
Bank
Pin Description
Pin Number No Connect in XC2V1500
5
IO_L02P_5/D7
AC6
5
IO_L01N_5/RDWR_B
AB6
5
IO_L01P_5/CS_B
AC5
No Connect in XC2V2000
6
IO_L01P_6
AF2
6
IO_L01N_6
AE1
6
IO_L02P_6/VRN_6
AB4
6
IO_L02N_6/VRP_6
AB3
6
IO_L03P_6
AD2
6
IO_L03N_6/VREF_6
AD1
6
IO_L04P_6
AC2
6
IO_L04N_6
AC1
6
IO_L06P_6
AB2
6
IO_L06N_6
AB1
6
IO_L19P_6
AA4
6
IO_L19N_6
AA3
6
IO_L21P_6
Y6
6
IO_L21N_6/VREF_6
Y5
6
IO_L22P_6
W6
6
IO_L22N_6
W7
6
IO_L24P_6
AA2
6
IO_L24N_6
AA1
6
IO_L25P_6
Y4
NC
NC
6
IO_L25N_6
Y3
NC
NC
6
IO_L43P_6
W5
6
IO_L43N_6
W4
6
IO_L45P_6
W2
6
IO_L45N_6/VREF_6
W3
6
IO_L46P_6
Y1
6
IO_L46N_6
W1
6
IO_L48P_6
V6
6
IO_L48N_6
V7
6
IO_L49P_6
V5
6
IO_L49N_6
V4
6
IO_L51P_6
V3
6
IO_L51N_6/VREF_6
V2
6
IO_L52P_6
V1
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
44