DS031 Datasheet, PDF (274/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 13: FF1517 BGA — XC2V4000, XC2V6000, and XC2V8000
Bank
Pin Description
Pin Number No Connect in the XC2V4000 No Connect in the XC2V6000
7
IO_L74P_7
U31
7
IO_L74N_7
T31
7
IO_L73P_7
R38
7
IO_L73N_7
T38
7
IO_L72P_7
T33
7
IO_L72N_7
U33
7
IO_L71P_7
U30
7
IO_L71N_7
T30
7
IO_L70P_7
R37
7
IO_L70N_7
T37
7
IO_L69P_7/VREF_7
R36
7
IO_L69N_7
T36
7
IO_L68P_7
T32
7
IO_L68N_7
R32
7
IO_L67P_7
P39
7
IO_L67N_7
R39
7
IO_L60P_7
R35
7
IO_L60N_7
T35
7
IO_L59P_7
U28
7
IO_L59N_7
T28
7
IO_L58P_7
N37
7
IO_L58N_7
P37
7
IO_L57P_7/VREF_7
R34
7
IO_L57N_7
T34
7
IO_L56P_7
T29
7
IO_L56N_7
R29
7
IO_L55P_7
M39
7
IO_L55N_7
N39
7
IO_L54P_7
N36
7
IO_L54N_7
P36
7
IO_L53P_7
R30
7
IO_L53N_7
P30
7
IO_L52P_7
M38
7
IO_L52N_7
N38
7
IO_L51P_7/VREF_7
P33
7
IO_L51N_7
R33
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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