DS031 Datasheet, PDF (220/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 12: FF1152 BGA — XC2V3000, XC2V4000, XC2V6000, and XC2V8000
Bank
Pin Description
Pin Number
2
IO_L81N_2
R7
2
IO_L81P_2/VREF_2
R6
2
IO_L82N_2
U5
2
IO_L82P_2
T5
2
IO_L83N_2
T10
2
IO_L83P_2
U10
2
IO_L84N_2
U4
2
IO_L84P_2
T4
2
IO_L91N_2
T2
2
IO_L91P_2
R1
2
IO_L92N_2
U7
2
IO_L92P_2
T7
2
IO_L93N_2
T6
2
IO_L93P_2/VREF_2
U6
2
IO_L94N_2
U1
2
IO_L94P_2
U2
2
IO_L95N_2
U9
2
IO_L95P_2
U8
2
IO_L96N_2
U3
2
IO_L96P_2
V4
No Connect in the XC2V3000
NC
NC
NC
NC
NC
NC
NC
NC
3
IO_L96N_3
V6
3
IO_L96P_3
W6
3
IO_L95N_3
V5
3
IO_L95P_3
W5
3
IO_L94N_3
V7
3
IO_L94P_3
W7
3
IO_L93N_3/VREF_3
V10
3
IO_L93P_3
W10
3
IO_L92N_3
V1
3
IO_L92P_3
V2
3
IO_L91N_3
W3
3
IO_L91P_3
Y3
3
IO_L84N_3
V9
NC
3
IO_L84P_3
V8
NC
3
IO_L83N_3
W4
NC
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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