DS031 Datasheet, PDF (114/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 7: FG456/FGG456 BGA — XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
Pin Number No Connect in XC2V250
2
IO_L45N_2
H19
2
IO_L45P_2/VREF_2
H20
2
IO_L46N_2
H21
2
IO_L46P_2
H22
2
IO_L48N_2
J17
2
IO_L48P_2
J18
2
IO_L49N_2
J19
NC
2
IO_L49P_2
J20
NC
2
IO_L51N_2
J21
NC
2
IO_L51P_2/VREF_2
J22
NC
2
IO_L52N_2
K17
NC
2
IO_L52P_2
K18
NC
2
IO_L54N_2
K19
NC
2
IO_L54P_2
K20
NC
2
IO_L91N_2
K21
2
IO_L91P_2
K22
2
IO_L93N_2
L17
2
IO_L93P_2/VREF_2
L18
2
IO_L94N_2
L19
2
IO_L94P_2
L20
2
IO_L96N_2
L21
2
IO_L96P_2
L22
No Connect in XC2V500
3
IO_L96N_3
M21
3
IO_L96P_3
M20
3
IO_L94N_3
M19
3
IO_L94P_3
M18
3
IO_L93N_3/VREF_3
M17
3
IO_L93P_3
N17
3
IO_L91N_3
N22
3
IO_L91P_3
N21
3
IO_L54N_3
N20
NC
3
IO_L54P_3
N19
NC
3
IO_L52N_3
N18
NC
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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