DS031 Datasheet, PDF (111/318 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Platform FPGAs: Pinout Information
FG456/FGG456 Fine-Pitch BGA Package
As shown in Table 7, XC2V250, XC2V500, and XC2V1000 Virtex-II devices are available in the FG456/FGG456 fine-pitch
BGA package. Pins in the XC2V250, XC2V500, and XC2V1000 devices are the same, except for the pin differences in the
XC2V250 and XC2V500 devices shown in the No Connect columns. Following this table are the FG456/FGG456 Fine-Pitch
BGA Package Specifications (1.00mm pitch).
Table 7: FG456/FGG456 BGA — XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
Pin Number No Connect in XC2V250
0
IO_L01N_0
B4
0
IO_L01P_0
A4
0
IO_L02N_0
C4
0
IO_L02P_0
C5
0
IO_L03N_0/VRP_0
B5
0
IO_L03P_0/VRN_0
A5
0
IO_L04N_0/VREF_0
D6
0
IO_L04P_0
C6
0
IO_L05N_0
B6
0
IO_L05P_0
A6
0
IO_L06N_0
E7
0
IO_L06P_0
E8
0
IO_L21N_0
D7
NC
0
IO_L21P_0/VREF_0
C7
NC
0
IO_L22N_0
B7
NC
0
IO_L22P_0
A7
NC
0
IO_L24N_0
D8
NC
0
IO_L24P_0
C8
NC
0
IO_L49N_0
B8
NC
0
IO_L49P_0
A8
NC
0
IO_L51N_0
E9
NC
0
IO_L51P_0/VREF_0
F9
NC
0
IO_L52N_0
D9
NC
0
IO_L52P_0
C9
NC
0
IO_L54N_0
B9
NC
0
IO_L54P_0
A9
NC
0
IO_L91N_0/VREF_0
E10
0
IO_L91P_0
F10
0
IO_L92N_0
D10
0
IO_L92P_0
C10
No Connect in XC2V500
NC
NC
NC
NC
NC
NC
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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