DS031 Datasheet, PDF (119/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 7: FG456/FGG456 BGA — XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
Pin Number No Connect in XC2V250
6
IO_L46P_6
R2
6
IO_L46N_6
R1
6
IO_L48P_6
P6
6
IO_L48N_6
P5
6
IO_L49P_6
P4
NC
6
IO_L49N_6
P3
NC
6
IO_L51P_6
P2
NC
6
IO_L51N_6/VREF_6
P1
NC
6
IO_L52P_6
N6
NC
6
IO_L52N_6
N5
NC
6
IO_L54P_6
N4
NC
6
IO_L54N_6
N3
NC
6
IO_L91P_6
N2
6
IO_L91N_6
N1
6
IO_L93P_6
M6
6
IO_L93N_6/VREF_6
M5
6
IO_L94P_6
M4
6
IO_L94N_6
M3
6
IO_L96P_6
M2
6
IO_L96N_6
M1
No Connect in XC2V500
7
IO_L96P_7
L2
7
IO_L96N_7
L3
7
IO_L94P_7
L4
7
IO_L94N_7
L5
7
IO_L93P_7/VREF_7
K1
7
IO_L93N_7
K2
7
IO_L91P_7
K3
7
IO_L91N_7
K4
7
IO_L54P_7
L6
NC
7
IO_L54N_7
K6
NC
7
IO_L52P_7
K5
NC
7
IO_L52N_7
J5
NC
7
IO_L51P_7/VREF_7
J1
NC
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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