DS031 Datasheet, PDF (246/318 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Platform FPGAs: Pinout Information
FF1517 Flip-Chip Fine-Pitch BGA Package
As shown in Table 13, XC2V4000, XC2V6000, and XC2V8000 Virtex-II devices are available in the FF1517 flip-chip
fine-pitch BGA package. Pins in each of these devices are the same, except for the pin differences in the XC2V4000 and
XC2V6000 devices shown in the No Connect columns. Following this table are the FF1517 Flip-Chip Fine-Pitch BGA
Package Specifications (1.00mm pitch).
Table 13: FF1517 BGA — XC2V4000, XC2V6000, and XC2V8000
Bank
Pin Description
Pin Number No Connect in the XC2V4000 No Connect in the XC2V6000
0
IO_L01N_0
B36
0
IO_L01P_0
C36
0
IO_L02N_0
J30
0
IO_L02P_0
J29
0
IO_L03N_0/VRP_0
D33
0
IO_L03P_0/VRN_0
D34
0
IO_L04N_0/VREF_0
C34
0
IO_L04P_0
C35
0
IO_L05N_0
H30
0
IO_L05P_0
G30
0
IO_L06N_0
D32
0
IO_L06P_0
E33
0
IO_L07N_0
A35
NC
0
IO_L07P_0
A36
NC
0
IO_L08N_0
K28
NC
0
IO_L08P_0
J28
NC
0
IO_L09N_0
E32
NC
0
IO_L09P_0/VREF_0
F32
NC
0
IO_L10N_0
B34
NC
0
IO_L10P_0
B35
NC
0
IO_L11N_0
H29
NC
0
IO_L11P_0
H28
NC
0
IO_L12N_0
F31
NC
0
IO_L12P_0
G31
NC
0
IO_L19N_0
C32
0
IO_L19P_0
C33
0
IO_L20N_0
M26
0
IO_L20P_0
M25
0
IO_L21N_0
E30
0
IO_L21P_0/VREF_0
E31
0
IO_L22N_0
A33
DS031-4 (v3.5) November 5, 2007
Product Specification
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