DS031 Datasheet, PDF (150/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 9: BG575/BGG575 BGA — XC2V1000, XC2V1500, and XC2V2000
Bank
Pin Description
Pin Number No Connect in XC2V1000
2
IO_L69P_2/VREF_2
L18
NC
2
IO_L70N_2
K23
NC
2
IO_L70P_2
L24
NC
2
IO_L72N_2
K22
NC
2
IO_L72P_2
L22
NC
2
IO_L73N_2
L21
NC
2
IO_L73P_2
L20
NC
2
IO_L91N_2
M23
2
IO_L91P_2
N24
2
IO_L93N_2
M21
2
IO_L93P_2/VREF_2
M22
2
IO_L94N_2
M19
2
IO_L94P_2
M20
2
IO_L96N_2
M17
2
IO_L96P_2
M18
No Connect in XC2V1500
NC
NC
3
IO_L96N_3
N23
3
IO_L96P_3
N22
3
IO_L94N_3
N20
3
IO_L94P_3
N21
3
IO_L93N_3/VREF_3
N19
3
IO_L93P_3
N18
3
IO_L91N_3
N17
3
IO_L91P_3
P17
3
IO_L73N_3
P24
NC
NC
3
IO_L73P_3
R24
NC
NC
3
IO_L72N_3
R23
NC
3
IO_L72P_3
R22
NC
3
IO_L70N_3
P22
NC
3
IO_L70P_3
P21
NC
3
IO_L69N_3/VREF_3
P20
NC
3
IO_L69P_3
P18
NC
3
IO_L67N_3
T24
NC
3
IO_L67P_3
U24
NC
3
IO_L54N_3
T23
3
IO_L54P_3
T22
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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