DS031 Datasheet, PDF (156/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 9: BG575/BGG575 BGA — XC2V1000, XC2V1500, and XC2V2000
Bank
Pin Description
Pin Number No Connect in XC2V1000
6
IO_L91N_6
P4
6
IO_L93P_6
N4
6
IO_L93N_6/VREF_6
N3
6
IO_L94P_6
N6
6
IO_L94N_6
N5
6
IO_L96P_6
N8
6
IO_L96N_6
N7
No Connect in XC2V1500
7
IO_L96P_7
N2
7
IO_L96N_7
M1
7
IO_L94P_7
M2
7
IO_L94N_7
M3
7
IO_L93P_7/VREF_7
M4
7
IO_L93N_7
M5
7
IO_L91P_7
M6
7
IO_L91N_7
M7
7
IO_L73P_7
M8
NC
NC
7
IO_L73N_7
L8
NC
NC
7
IO_L72P_7
L1
NC
7
IO_L72N_7
K1
NC
7
IO_L70P_7
K2
NC
7
IO_L70N_7
K3
NC
7
IO_L69P_7/VREF_7
L3
NC
7
IO_L69N_7
L4
NC
7
IO_L67P_7
L5
NC
7
IO_L67N_7
L7
NC
7
IO_L54P_7
J1
7
IO_L54N_7
H1
7
IO_L52P_7
J2
7
IO_L52N_7
J3
7
IO_L51P_7/VREF_7
J4
7
IO_L51N_7
J5
7
IO_L49P_7
K5
7
IO_L49N_7
K6
7
IO_L48P_7
F1
7
IO_L48N_7
F2
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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