DS031 Datasheet, PDF (107/318 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Platform FPGAs: Pinout Information
Table 6: FG256/FGG256 BGA — XC2V40, XC2V80, XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
Pin Number No Connect in XC2V40
7
IO_L45N_7
F5
NC
7
IO_L43P_7
F1
NC
7
IO_L43N_7
F2
NC
7
IO_L06P_7
F3
NC
7
IO_L06N_7
F4
NC
7
IO_L04P_7
E1
NC
7
IO_L04N_7
E2
NC
7
IO_L03P_7/VREF_7
E3
7
IO_L03N_7
E4
7
IO_L02P_7/VRN_7
D2
7
IO_L02N_7/VRP_7
D3
7
IO_L01P_7
D1
7
IO_L01N_7
C1
No Connect in XC2V80
NC
NC
NC
0
VCCO_0
F8
0
VCCO_0
F7
0
VCCO_0
E8
1
VCCO_1
F10
1
VCCO_1
F9
1
VCCO_1
E9
2
VCCO_2
H12
2
VCCO_2
H11
2
VCCO_2
G11
3
VCCO_3
K11
3
VCCO_3
J12
3
VCCO_3
J11
4
VCCO_4
M9
4
VCCO_4
L10
4
VCCO_4
L9
5
VCCO_5
M8
5
VCCO_5
L8
5
VCCO_5
L7
6
VCCO_6
K6
6
VCCO_6
J6
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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