M306H7MG-XXXFP Datasheet, PDF (95/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
10. SERIAL I/O
RxDi
No reverse
IOPOL=0
RxD data
reverse circuit
Reverse _IOPOL=1
1SP
SP
2SP
STPS= 0
SP
STPS= 1
PAR
disabled
PRYE=0
PAR
PRYE=1
PAR
enabled
Clock
synchronous
type
UART
Clock
synchronous type
UART
(7 bits)
UART
(8 bits)
UART(7 bits)
UART
(9 bits)
Clock
synchronous type
UART
(8 bits)
UART
(9 bits)
UARTi receive register
0 0 0 0 0 0 0 D8
D7 D6 D5 D4 D3 D2 D1 D0
UiRB register
Logic reverse circuit + MSB/LSB conversion circuit
Data bus high-order bits
Data bus low-order bits
Logic reverse circuit + MSB/LSB conversion circuit
D8
D7 D6 D5 D4 D3 D2 D1 D0
UiTB register
UART
(9 bits)
UART
(8 bits)
UART
(9 bits)
PAR
2SP _{STPS= 1} enabled _PRYE=1 UART
SP
SP
PAR
Clock
synchronous type
STPS
=0
1SP
PAR
disabled
PRYE=0
Clock
synchronous
“0” ^type
UART
(7 bits)
UART
(8 bits)
Clock
synchronous type
i=0 to 2
SP: Stop bit
PAR: Parity bit
SMD2 to SMD0, STPS, PRYE, IOPOL, CKDIR: UiMR register's bits
UiERE: UiC1 register's bit
UART(7 bits)
UARTi transmit register
Error signal output
disable
UiERE=0
Error signal
UiERE=1 ^{output circuit}
Error signal output
enable
No reverse
IOPOL=0
TxD data
reverse circuit
IOPOL=1
Reverse
TxDi
Figure 10.2 UARTi Transmit/Receive Unit
Rev.2.10 Oct 25, 2006 Page 95 of 326
REJ03B0152-0210