M306H7MG-XXXFP Datasheet, PDF (59/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
6. INTERRUPTS
Address match interrupt enable register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
AIER
Address
000916
After reset
XXXXXX002
Bit symbol
Bit name
Function
RW
AIER0
Address match interrupt 0
enable bit
0 : Interrupt disabled
1 : Interrupt enabled
AIER1 ^{Address match interrupt 1} 0 : Interrupt disabled
enable bit
1 : Interrupt enabled
RW
(b7-b2)
Nothing is assigned.
When write, set to “0”.
When read, their contents are indeterminate.
Address match interrupt enable register 2
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
AIER2
Address
01BB16
After reset
XXXXXX002
Bit symbol
Bit name
Function
RW
AIER20 ^{Address match interrupt 2} 0 : Interrupt disable
enable bit
1 : Interrupt enabled
RW
AIER21 Address match interrupt 3 0 : Interrupt disabled
enable bit
1 : Interrupt enable
RW
(b7-b2)
Nothing is assigned.
When write, set to “0”.
When read, their contents are indeterminate.
Address match interrupt register i (i = 0 to 3)
(b23)
b7
(b19)
b3
(b16)(b15)
b0 b7
(b8)
b0 b7
Symbol
b0 _RMAD0
RMAD1
RMAD2
RMAD3
Address
001216 to 001016
001616 to 001416
01BA16 to 01B816
01BE16 to 01BC16
After reset
X0000016
X0000016
X0000016
X0000016
Function
Setting range
RW
Address setting register for address match interrupt 0000016 to FFFFF16 _RW
Nothing is assigned.
When write, set to “0”.
When read, their contents are indeterminate.
Figure 6.11 AIER Register, AIER2 Register and RMAD0 to RMAD3 Registers
Rev.2.10 Oct 25, 2006 Page 59 of 326
REJ03B0152-0210