M306H7MG-XXXFP Datasheet, PDF (280/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
17. FLASH MEMORY VERSION
Table 17.2 Flash Memory Rewrite Modes Overview
Flash memory CPU rewrite mode (Note 1) Standard serial I/O mode
Parallel I/O mode
rewrite mode
Function
The user ROM area is rewrit- The user ROM area is rewrit- The boot ROM and user
ten by executing software ten by using a dedicated se- ROM areas are rewritten by
commands from the CPU. rial programmer.
using a dedicated parallel
EW0 mode:
Standard serial I/O mode 1: programmer.
Can be rewritten in any Clock sync serial I/O
area other than the flash Standard serial I/O mode 2:
memory (Note 2)
UART
EW1 mode:
Can be rewritten in the
flash memory
Areas which User ROM area
User ROM area
User ROM area
can be rewritten
Boot ROM area
Operation Single chip mode
Boot mode
Parallel I/O mode
mode
Boot mode (EW0 mode)
ROM
None
Serial programmer
Parallel programmer
programmer
Note 1: Bit 3 of processor mode register 1 remains set to "1" while the FMR0 register FMR01 bit = 1 (CPU
rewrite mode enabled).
Bit 3 of processor mode register 1 is reverted to its original value by clearing the FMR01 bit to "0"
(CPU rewrite mode disabled). However, if bit 3 of processor mode register 1 is changed during CPU
rewrite mode, its changed value is not reflected until after the FMR01 bit is cleared to "0".
Note 2: When in CPU rewrite mode, bit 0 and bit 3 in the PM1 register are set to "1". The rewrite
control program can only be executed in the internal RAM.
Rev.2.10 Oct 25, 2006 Page 280 of 326
REJ03B0152-0210