M306H7MG-XXXFP Datasheet, PDF(89/329 Page) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

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M306H7MG-XXXFP Datasheet, PDF (89/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

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M306H7MG-XXXFP/MC-XXXFP/FGFP

9. TIMERS

9.2.1 Timer Mode

In timer mode, the timer counts a count source generated internally (see Table 9.6). Figure 9.17 shows TBiMR

register in timer mode.

Table 9.6 Specifications in Timer Mode

Item

Count source

Count operation

Divide ratio

Count start condition

Count stop condition

Interrupt request generation timing

TBiIN pin function

Read from timer

Write to timer

Specification

f1, f2, f8, f32, fC32

â¢ Down-count

â¢ When the timer underflows, it reloads the reload register contents and

continues counting

1/(n+1) n: set value of TBi register (i= 0 to 5) 000016 to FFFF16

Set TBiS bit(Note) to â1â (= start counting)

Set TBiS bit to â0â (= stop counting)

Timer underflow

I/O port

Count value can be read by reading TBi register

â¢ When not counting and until the 1st count source is input after counting start

Value written to TBi register is written to both reload register and counter

â¢ When counting (after 1st count source input)

Value written to TBi register is written to only reload register

(Transferred to counter when reloaded next)

Note : The TB0S to TB2S bits are assigned to the TABSR register bit 5 to bit 7, and the TB3S to TB5S bits

are assigned to the TBSR register bit 5 to bit 7.

Timer Bi mode register (i= 0 to 5)

b7 b6 b5 b4 b3 b2 b1 b0

00

Symbol

TB0MR to TB2MR

TB3MR to TB5MR

Address

039B16 to 039D16

035B16 to 035D16

After reset

00XX00002

00XX00002

Bit symbol

Bit name

Function

RW

TMOD0

Operation mode select bit

b1 b0

0 0 : Timer mode

RW

TMOD1

RW

MR0

Has no effect in timer mode

RW

MR1

Can be set to â0â or â1â

RW

MR2

TB0MR, TB3MR registers

Must be set to â0â in timer mode

RW

TB1MR, TB2MR, TB4MR, TB5MR registers

Nothing is assigned. When write, set to â0â. When read, its

content is indeterminate

MR3

When write in timer mode, set to â0â. When read in timer mode, its

content is indeterminate.

RO

TCK0

Count source select bit

b7 b6

0 0 : f1 or f2

RW

0 1 : f8

TCK1

1 0 : f32

RW

1 1 : fC32

Figure 9.17 TBiMR Register in Timer Mode

Rev.2.10 Oct 25, 2006 Page 89 of 326

REJ03B0152-0210

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