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M306H7MG-XXXFP Datasheet, PDF (185/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER
M306H7MG-XXXFP/MC-XXXFP/FGFP
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14. EXPANSION FUNCTION
Slice RAM bit composition
The each head address of the address is corresponded to slice line following slice information.
Line register 3
Line register 2
Line register 1
Other
SR00F to SR004
0
0
0
0
SR003
field*
field*
field*
field*
SR002
0
0
0
0
SR001
1
1
0
0
SR000
1
0
1
0
* field
* the first field : 1
the second field : 0
(1) PDC
In case of the PDC data, 16 bits (2 data) are stored for the 1 address from the LSB side.
Clock run-in
+ flaming code
Data1 Data2 Data3 Data4 Data5 Data6
Data40
Data42
Data39
Data41
L
ML
M
S
SS
S
B
BB
B
SR020 SR02F
SR030
SR040
SR03F
SR04F SR150
SR15F
SR160
SR16F
Note. The expansion register is the slice data storing pattern when setting the START
(bit 1 in address 2816 bit) to "1". SR17x is the unused area.
(2) VPS
In case of the VPS data or the VBI data, 8 bits (a data) are stored for an address from the LSB side.
Low-order 8 bits hold the slice data. And, high-order 8 bits hold warning bit, when the send data is not recognized
as bi-phase type.
The case of bi-phase data ="1,0" or "0,1" (the bi-phase type) becomes "0" for this warning bit, and it becomes "1"
in bi-phase data="0,0" or "1,1" (it is not the bi-phase type).
(For example, bi-phase data of SR011 is "0,0" or "1,1", "1" is set to SR019.)
Clock run-in
+ flaming code
Data1 Data2 Data3 Data4
L
ML
M
S
SS
S
B
BB
B
Data11 Data12 Data13
SR020 SR027 SR040 SR047
SR030 SR037 SR050 SR057
SR0C0 SR0C7 SR0E0 SR0E7
SR0D0 SR0D7
Note. The expansion register is the slice data storing pattern when setting the START
(bit 1 in address 2816 bit) to "1". From SR0Fx to SR17x are the unused area.
(3) EPG-J
Clock run-in
+ flaming code
Data1
Data3
Data5
Data2
Data4
Data6
Data32
Data34
Data31
Data33
C
ML
M
S
SS
S
B
BB
B
SR020
SR02F
SR030
SR040
SR03F
SR04F SR110
SR11F
SR120
SR12F
Note. The expansion register is the slice data storing pattern when setting the START
(bit 1 in address 2816 bit) to "1". From SR13x to SR17x are the unused area.
Figure 14.2 Slice RAM bit composition
Rev.2.10 Oct 25, 2006 Page 185 of 326
REJ03B0152-0210