M306H7MG-XXXFP Datasheet, PDF (16/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
3. RESET
Table 3.1 Pin Status When RESET Pin Level is “L
Pin name
CNVSS = VSS
P0
Input port
P1
Input port
P2, P3, P40 to P43 Input port
P44
Input port
P45 to P47
Input port
P50
Input port
P51
Input port
P52
Input port
P53
Input port
P54
Input port
P55
Input port
P56
Input port
P57
Input port
P6, P7, P80 to P84,
P86, P87, P9
Input port
Note : Do not set CNVss=Vcc for this product.
Status
CNVSS = VCC (Note)
BYTE = VSS
BYTE = VCC
Data input
Data input
Data input
Input port
Address output (undefined)
Address output (undefined)
CS0 output ("H" is output)
CS0 output ("H" is output)
Input port (Pulled high)
Input port (Pulled high)
WR output ("H" is output)
WR output ("H" is output)
BHE output (undefined)
BHE output (undefined)
RD output ("H" is output)
RD output ("H" is output)
BCLK output
BCLK output
HLDA output (The output value HLDA output (The output value
depends on the input to the depends on the input to the
HOLD pin)
HOLD pin)
HOLD input
ALE output ("L" is output)
RDY input
HOLD input
ALE output ("L" is output)
RDY input
Input port
Input port
Figure 3.3
b15
000016
000016
000016
000016
000016
000016
000016
b0
Data register(R0)
Data register(R1)
Data register(R2)
Data register(R3)
Address register(A0)
Address register(A1)
Frame base register(FB)
b19
b0
0000016
Content of addresses FFFFE16 to FFFFC16
b15
b0
000016
000016
000016
b15
b0
000016
b15
b8 b7
b0
IPL
U I OB S Z D C
CPU Register Status After Reset
Interrupt table register(INTB)
Program counter(PC)
User stack pointer(USP)
Interrupt stack pointer(ISP)
Static base register(SB)
Flag register(FLG)
Rev.2.10 Oct 25, 2006 Page 16 of 326
REJ03B0152-0210