M306H7MG-XXXFP Datasheet, PDF (216/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
14. EXPANSION FUNCTION
22. Address 2316 (=DA5 to 0)
DD15
000
DD8DD7
000 0
DD0
Bit symbol
Bit name
DIV_VPSS0 The PLL fine-tuning bit for
VPS
DIV_VPSS1
DIV_VPSS2
DIV_VPS0
DIV_VPS1
The divided value selection
bit of PLL for VPS
DIV_VPS2
DIV_VPS3
DIV_VPS4
Function
RΩ
Slice clock frequency fPDC for VPS
is adjusted.
(^{8 n}
f VPS = f DIVV × Σ 2 DIV_VPSn
n=0
) ^{2 m-3}
+ Σ 2 DIV_VPSSm + 2
m=0
f DIVV : Horizontal synchronized
signal frequency
When VPS is acquired
( ) DIV_VPS4 to 0,
DIV_VPSS2 to 0
= (00100110)2
When CC, CC2X and ID-1 are acquired
( ) DIV_VPS4 to 0,
DIV_VPSS2 to 0
= (11010100)2
Reserved bits
Must set to "0."
×
Horizontal synchronized signal 0 Analog input
HORAX_ON _{selection bit}
1 The digital input of HOR
Reserved bits
Must set to "0."
×
Rev.2.10 Oct 25, 2006 Page 216 of 326
REJ03B0152-0210