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M306H7MG-XXXFP Datasheet, PDF (28/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER
M306H7MG-XXXFP/MC-XXXFP/FGFP
4. CLOCK GENERATION CIRCUIT
System clock control register 1 (Note 1)
b7 b6 b5 b4 b3 b2 b1 b0
00 00
Symbol
CM1
Address
000716
After reset
001000002
Bit symbol
Bit
Function
RW
CM10
All clock stnoapmcoentrol bit
(Notes 4, 5)
0 : Clock on
1 : All clocks off (stop mode)
RW
(b4-b1) Reserved bit
Must set to “0”
RW
CM15 XIN-XOUT drive capacity
0 : LOW
RW
select bit (Note 2)
1 : HIGH
b7 b6
CM16 Main clock division
0 0 : No division mode
RW
select bit 1 (Note 3)
0 1 : Division by 2 mode
CM17
1 0 : Division by 4 mode
1 1 : Division by 16 mode
RW
Note 1: Write to this register after setting the PRC0 bit of PRCR register to “1” (write enable).
Note 2: When entering stop mode from high or middle speed mode, or when the CM05 bit is set to “1” (main clock turned off) in low
speed mode, the CM15 bit is set to “1” (drive capability high).
Note 3: Effective when the CM06 bit is “0” (CM16 and CM17 bits enable).
Note 4: If the CM10 bit is “1” (stop mode), XOUT goes “H” and the internal feedback resistor is disconnected. The XCIN and XCOUT
pins are placed in the high-impedance state.
Note 5: When the PM21 bit of PM2 register is set to “1” (clock modification disable), writing to the CM10 bits has no effect.
Figure 4.3 CM1 Register
Rev.2.10 Oct 25, 2006 Page 28 of 326
REJ03B0152-0210