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M306H7MG-XXXFP Datasheet, PDF (88/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER
M306H7MG-XXXFP/MC-XXXFP/FGFP
9. TIMERS
Timer Bi register (i=0 to 5)(Note 1)
(b15)
(b8)
b7
b0 b7
b0
Symbol
TB0
TB1
TB2
TB3
TB4
TB5
Address
039116, 039016
039316, 039216
039516, 039416
035116, 035016
035316, 035216
035516, 035416
After reset
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Mode
Function
Setting range RW
Timer mode
Divide the count source by n + 1
where n = set value
000016 to FFFF16 RW
Event counter
mode
Divide the count source by n + 1
where n = set value (Note 2)
000016 to FFFF16 RW
Pulse period
Measures a pulse period or width
modulation mode,
Pulse width
RO
modulation mode
Note 1: The register must be accessed in 16 bit units.
Note 2: The timer counts pulses from an external device or overflows or underflows of other timers.
Count start flag
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
TABSR
Address
038016
After reset
0016
Bit symbol
TA0S
TA1S
TA2S
TA3S
TA4S
TB0S
TB1S
TB2S
Bit name
Timer A0 count start flag
Timer A1 count start flag
Timer A2 count start flag
Timer A3 count start flag
Timer A4 count start flag
Timer B0 count start flag
Timer B1 count start flag
Timer B2 count start flag
Function
0 : Stops counting
1 : Starts counting
RW
RW
RW
RW
RW
RW
RW
RW
RW
Timer B3, B4, B5 count start flag
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
TBSR
Address
034016
After reset
000XXXXX2
Bit symbol
Bit name
Function
RW
Nothing is assigned. When write, set to “0”. When read, their
(b4-b0) contents are indeterminate.
TB3S Timer B3 count start flag
0 : Stops counting
RW
1 : Starts counting
TB4S Timer B4 count start flag
RW
TB5S Timer B5 count start flag
RW
Clock prescaler reset flag
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
CPSRF
Address
038116
After reset
0XXXXXXX2
Bit symbol
Bit name
Function
RW
Nothing is assigned. When write, set to “0”. When read, their
(b6-b0) contents are indeterminate.
CPSR
Clock prescaler reset flag Setting this bit to “1” initializes the
prescaler for the timekeeping clock. RW
(When read, the value of this bit is “0”.)
Figure 9.16 TB0 to TB5 Registers, TABSR Register, TBSR Register, CPSRF Register
Rev.2.10 Oct 25, 2006 Page 88 of 326
REJ03B0152-0210