M306H7MG-XXXFP Datasheet, PDF (202/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
14. EXPANSION FUNCTION
Bit composition of an expansion register
1. Address 0016 (=DA5 to 0)
DD15
DD8DD7
DD0
Bit symbol
LN0_EV0
Bit name
The 0th line state register
selection bit
LN1_EV0
The 1st line state register
selection bit
LN2_EV0
The 2nd line state register
selection bit
LN3_EV0
The 3rd line state register
selection bit
LN4_EV0
The 4th line state register
selection bit
LN5_EV0
The 5th line state register
selection bit
LN6_EV0
The 6th line state register
selection bit
LN7_EV0
The 7th line state register
selection bit
LN8_EV0
The 8th line state register
selection bit
LN9_EV0
The 9th line state register
selection bit
The 10th line state register
LN10_EV0 _{selection bit}
The 11th line state register
LN11_EV0 _{selection bit}
LN12_EV0
The 12th line state register
selection bit
LN13_EV0
The 13th line state register
selection bit
LN14_EV0
The 14th line state register
selection bit
The 15th line state register
LN15_EV0 _{selection bit}
Function
RW
As for the slicing method of the n-th line
(Notes 1), it is chosen which set of the
state register settings of the three sets
(Notes 2) is used with the combination
of LNn_EV0 (address 0016 and 0216,
n = 0 to 17) and LNn_EV1 (address
0116 and 0316, n= 0 to 17.)
Four kinds of following state registers
can be chosen for every line (Notes 3.)
LNn_EV1 LNn_EV0 State register(Notes 2)
0
0
Do not set up
0
1
State register 1
1
0
State register 2
1
1
State register 3
Notes 1. The n-th line: The number of lines after a slice start.
Please refer to the supplement (3) of 15.6 expansion register composition
(P229) for details.
Notes 2. 06h to 0Ch address: State register 1
0Dh to 13h address: State register 2
14h to 1Ah address: State register 3
Notes 3. The example of a setting.
V after sync separation
H after sync separation
The 0th line The 1st line The 2nd line
line 1
line 2
•••
line n
line (n+1) line (n+2)
LN0_EV1=0 LN1_EV1=0 LN2_EV1=1
LN0_EV0=1 LN1_EV0=1 LN2_EV0=0
slice
slice
slice
processing by processing by processing by
setup of the setup of the setup of the
state register 1. state register 1. state register 2.
Rev.2.10 Oct 25, 2006 Page 202 of 326
REJ03B0152-0210