M306H7MG-XXXFP Datasheet, PDF (309/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
19. USAGE NOTES
19. USEGE NOTES
19.1 Precautions for Power Control
(1) When exiting stop mode by hardware reset, set RESET pin to “L” until a main clock or sub clock
oscillation is stabilized.
(2) Insert more than four NOP instructions after an WAIT instruction or a instruction to set the CM10 bit of
CM1 register to “1”. When shifting to wait mode or stop mode, an instruction queue reads ahead to the next
instruction to halt a program by an WAIT instruction and an instruction to set the CM10 bit to “1” (all
clocks stopped). The next instruction may be executed before entering wait mode or stop mode, depending
on a combination of instruction and an execution timing.
(3) Wait until the main clock oscillation stabilization time, before switching the clock source for CPU clock to
the main clock.
Similarly, wait until the sub clock oscillates stably before switching the clock source for CPU clock to the
sub clock.
(4) Suggestions to reduce power consumption
• Ports
The processor retains the state of each I/O port even when it goes to wait mode or to stop mode. A current
flows in active I/O ports. A pass current flows in input ports that high-impedance state. When entering wait
mode or stop mode, set non-used ports to input and stabilize the potential.
• A/D converter
When A/D conversion is not performed, set the VCUT bit of ADiCON1 register to “0” (no VREF
connection). When A/D conversion is performed, start the A/D conversion at least 1 ƒÊs or longer after
setting the VCUT bit to “1” (VREF connection).
• Stopping peripheral functions
Use the CM0 register CM02 bit to stop the unnecessary peripheral functions during wait mode. However,
because the peripheral function clock (fC32) generated from the sub-clock does not stop, this measure is not
conducive to reducing the power consumption of the chip. If low speed mode or low power dissipation
mode is to be changed to wait mode, set the CM02 bit to “0” (do not peripheral function clock stopped
when in wait mode), before changing wait mode.
• Switching the oscillation-driving capacity
Set the driving capacity to “LOW” when oscillation is stable.
• External clock
When using an external clock input for the CPU clock, set the CM0 register CM05 bit to “1” (stop). Setting
the CM05 bit to “1” disables the XOUT pin from functioning, which helps to reduce the amount of current
drawn in the chip. (When using an external clock input, note that the clock remains fed into the chip
regardless of how the CM05 bit is set.)
19.2 Precautions for Protect
Set the PRC2 bit to “1” (write enabled) and then write to any address, and the PRC2 bit will be cleared to “0” (write
protected). The registers protected by the PRC2 bit should be changed in the next instruction after setting the PRC2
bit to “1”. Make sure no interrupts or DMA transfers will occur between the instruction in which the PRC2 bit is set
to “1” and the next instruction.
19.3 Precautions for Interrupts
19.3.1 Reading address 0000016
Do not read the address 0000016 in a program. When a maskable interrupt request is accepted, the CPU reads
interrupt information (interrupt number and interrupt request priority level) from the address 0000016 during the
interrupt sequence. At this time, the IR bit for the accepted interrupt is cleared to “0”.
If the address 0000016 is read in a program, the IR bit for the interrupt which has the highest priority among the
enabled interrupts is cleared to “0”. This causes a problem that the interrupt is canceled, or an unexpected
interrupt request is generated.
Rev.2.10 Oct 25, 2006 Page 309 of 326
REJ03B0152-0210