M306H7MG-XXXFP Datasheet, PDF (65/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
8. DMAC
DMA1 request cause select register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
DM1SL
Address
03BA16
After reset
0016
Bit symbol
Bit name
Function
RW
DSEL0 _{DMA request cause Refer to note}
RW
DSEL1 ^{select bit}
RW
DSEL2
RW
DSEL3
RW
(b5-b4)
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
DMS
DSR
DMA request cause
expansion select bit
Software DMA
request bit
0: Basic cause of request
1: Extended cause of request
RW
A DMA request is generated by
setting this bit to “1” when the DMS
bit is “0” (basic cause) and the
RW
DSEL3 to DSEL0 bits are “00012”
(software trigger).
The value of this bit when read is “0” .
Note 1: The causes of DMA1 requests can be selected by a combination of DMS bit and DSEL3 to DSEL0 bits in the
manner described below.
DSEL3 to DSEL0
0 0 0 02
0 0 0 12
0 0 1 02
0 0 1 12
0 1 0 02
0 1 0 12
0 1 1 02
0 1 1 12
1 0 0 02
1 0 0 12
1 0 1 02
1 0 1 12
1 1 0 02
1 1 0 12
1 1 1 02
1 1 1 12
DMS=0(basic cause of request)
Falling edge of INT1 pin
Software trigger
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4 (Note 3)
Timer B0
Timer B1
Timer B2 (Note 2)
UART0 transmit
UART0 receive/ACK0
UART2 transmit
UART2 receive/ACK2
A/D conversion
UART1 receive/ACK1
DMS=1(extended cause of request)
–
–
–
–
–
SI/O3
SI/O4
Two edges of INT1
–
–
–
–
–
–
–
–
Note 2: Please change SECINTi (i = 0 to 3) in address 3616 enhancing registers of the enhanced feature to the following settings
when you use the DMA forwarding by timer B2 interrupt request.
• SECINTi = 00002
The DMA forwarding by the clock timer interrupt request cannot be used.
Note 3: Please change EXTIICINTi (i = 0 to 3) in address 02D616 I²C0 interrupt control register to the following settings when you
use the DMA forwarding by timer A4 interrupt request.
• EXTIICINTi = 00002
The DMA forwarding by the Multi-master I²C interrupt request cannot be used.
DMAi control register (i = 0,1)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
DM0CON
DM1CON
Address
002C16
003C16
After reset
00000X002
00000X002
Bit symbol
DMBIT
DMASL
DMAS
DMAE
DSD
DAD
(b7-b6)
Bit name
Function
Transfer unit bit select bit 0 : 16 bits
1 : 8 bits
Repeat transfer mode
select bit
0 : Single transfer
1 : Repeat transfer
DMA request bit
0 : DMA not requested
1 : DMA requested
DMA enable bit
Source address direction
select bit (Note 2)
0 : Disabled
1 : Enabled
0 : Fixed
1 : Forward
Destination address
0 : Fixed
direction select bit (Note 2) _{1 : Forward}
Nothing is assigned. When write, set to “0”. When
read, its content is “0”.
RW
RW
RW
RW
(Note 1)
RW
RW
RW
Note 1: The DMAS bit can be set to “0” by writing “0” in a program (This bit remains unchanged even if “1” is written).
Note 2: At least one of the DAD and DSD bits must be “0” (address direction fixed).
Figure 8.3 DM1SL Register, DM0CON Register, and DM1CON Registers
Rev.2.10 Oct 25, 2006 Page 65 of 326
REJ03B0152-0210