M306H7MG-XXXFP Datasheet, PDF(87/329 Page) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

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M306H7MG-XXXFP Datasheet, PDF (87/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

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M306H7MG-XXXFP/MC-XXXFP/FGFP

9. TIMERS

9.2 Timer B

Figure 9.14 shows a block diagram of the timer B. Figures 9.15 and 9.16 show registers related to the timer B.

Timer B supports the following three modes. Use the TMOD1 and TMOD0 bits of TBiMR register (i = 0 to 5) to

select the desired mode.

â¢ Timer mode: The timer counts an internal count source.

â¢ Event counter mode: The timer counts pulses from an external device or overflows or underflows of other

timers.

â¢ Pulse period/pulse width measuring mode: The timer measures an external signal's pulse period or pulse width.

Data bus high-order bits

Clock source selection

f1 or f2

f8

f32

fC32

â¢ Timer

â¢ Pulse period measurement,

pulse width measurement

Clock selection

â¢ Event counter

Data bus low-order bits

Low-order 8 bits

Reload register

High-order 8 bits

Counter

TBiIN

(i = 0 to 5)

Polarity switching,

edge pulse

Can be selected in only

event counter mode

TBj overflow (Note)

(j = i â 1. Note, however,

j = 2 when i = 0,

j = 5 when i = 3)

Note: Overflow or underflow.

Figure 9.14 Timer B Block Diagram

TABSR register

TBSR register

Counter reset circuit

TBi

Timer B0

Timer B1

Timer B2

Timer B3

Timer B4

Timer B5

Address

039116 039016

039316 039216

039516 039416

035116 035016

035316 035216

035516 035416

TBj

Timer B2

Timer B0

Timer B1

Timer B5

Timer B3

Timer B4

Timer Bi mode register (i=0 to 5)

b7 b6 b5 b4 b3 b2 b1 b0

Symbol

Address

After reset

TB0MR to TB2MR 039B16 to 039D16 00XX00002

TB3MR to TB5MR 035B16 to 035D16 00XX00002

Bit symbol

TMOD0

TMOD1

MR0

MR1

MR2

Bit name

Operation mode select bit

Function

b1 b0

0 0 : Timer mode

0 1 : Event counter mode

1 0 : Pulse period measurement mode,

pulse width measurement mode

1 1 : Must not be set

Function varies with each operation

mode

RW

RW

RW

RW

RW

RW

(Note 1)

MR3

TCK0

TCK1

Count source select bit

Note 1: Timer B0, timer B3.

Note 2: Timer B1, timer B2, timer B4, timer B5.

Function varies with each operation

mode

(Note 2)

RO

RW

RW

Figure 9.15 TB0MR to TB5MR Registers

Rev.2.10 Oct 25, 2006 Page 87 of 326

REJ03B0152-0210

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