M306H7MG-XXXFP Datasheet, PDF (321/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
19. USAGE NOTES
19.11.3 Precautions for Wait mode
When shifting to wait mode, set the FMR01 bit to “0” (CPU rewrite mode diabled) before executing the WAIT
instruction.
19.11.4 Precautions for Low power dissipation mode
If the CM05 bit is set to “1” (main clock stop), the following commands must not be executed.
• Program
• Block erase
• Lock bit program
19.11.5 Writing command and data
Write the command code and data at even addresses.
19.11.6 Precautions for Program Command
Write ‘xx4016’ in the first bus cycle and write data to the write address in the second bus cycle, and an auto
program operation (data program and verify) will start. Make sure the address value specified in the first bus
cycle is the same even address as the write address specified in the second bus cycle.
19.11.7 Precautions for Lock Bit Program Command
Write ‘xx7716’ in the first bus cycle and write ‘xxD016’ to the uppermost address of a block (even address,
however) in the second bus cycle, and the lock bit for the specified block is cleared to “0”.
Make sure the address value specified in the first bus cycle is the same uppermost block address that is specified
in the second bus cycle.
19.11.8 Operation speed
Before entering CPU rewrite mode (EW0 or EW1 mode), select 10 MHz or less for CPU clock using the CM0
register’s CM06 bit and CM1 register’s CM17−6 bits. Also, set the PM1 register’s PM17 bit to 1 (with wait
state).
19.11.9 Instructions inhibited against use
The following instructions cannot be used in EW0 mode because the flash memory’s internal data is referenced:
UND instruction, INTO instruction, JMPS instruction, JSRS instruction, and BRK instruction
19.11.10 Interrupts
EW0 Mode
• Any interrupt which has a vector in the variable vector table can be used providing that its vector is
transferred into the RAM area.
• The NMI and watchdog timer interrupts can be used because the FMR0 register and FMR1 register are
initialized when one of those interrupts occurs. The jump addresses for those interrupt service routines
should be set in the fixed vector table.
Because the rewrite operation is halted when a NMI or watchdog timer interrupt occurs, the rewrite
program must be executed again after exiting the interrupt service routine.
• The address match interrupt cannot be used because the flash memory’s internal data is referenced.
EW1 Mode
• Make sure that any interrupt which has a vector in the variable vector table or address match interrupt will
not be accepted during the auto program or auto erase period.
• Avoid using watchdog timer interrupts.
• The NMI interrupt can be used because the FMR0 register and FMR1 register are initialized when this
interrupt occurs. The jump address for the interrupt service routine should be set in the fixed vector table.
Because the rewrite operation is halted when a NMI interrupt occurs, the rewrite program must be executed
again after exiting the interrupt service routine.
Rev.2.10 Oct 25, 2006 Page 321 of 326
REJ03B0152-0210