M306H7MG-XXXFP Datasheet, PDF (48/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
6. INTERRUPTS
6.5 Interrupt Control
The following describes how to enable/disable the maskable interrupts, and how to set the priority in which order
they are accepted. What is explained here does not apply to nonmaskable interrupts.
Use the FLG register’s I flag, IPL, and each interrupt control register’s ILVL2 to ILVL0 bits to enable/disable the
maskable interrupts. Whether an interrupt is requested is indicated by the IR bit in each interrupt control register.
Figure 6.3 shows the interrupt control registers.
Rev.2.10 Oct 25, 2006 Page 48 of 326
REJ03B0152-0210