M306H7MG-XXXFP Datasheet, PDF (215/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
20. Address 2116 (=DA5 to 0)
DD15
01
DD8DD7
DD0
Bit symbol
Bit name
Nothing is assigned.
Reserved bit
Reserved bit
14. EXPANSION FUNCTION
Function
Must set to "1."
Must set to "0."
RW
××
×
×
21. Address 2216 (=DA5 to 0)
DD15
DD8DD7
DD0
Bit symbol
Bit name
DIV_PDCS0 The PLL fine-tuning bit for
PDC
DIV_PDCS1
DIV_PDCS2
Function
RW
Slice clock frequency fPDC for PDC
is adjusted.
(^{8 n}
f PDC = fDIVP × Σ 2 DIV_PDCn
n=0
) ²
+Σ
m-3
2 DIV_PDCSm+2
m=0
DIV_PDC0
DIV_PDC1
The divided value selection bit
of PLL for PDC
DIV_PDC2
DIV_PDC3
DIV_PDC4
f DIVP : Horizontal synchronized
signal frequency
• When teletext (PDC) data is acquired
( ) DIV_PDC4 to 0, DIV_PDCS2 to 0
= (00100011)2
• When EPG-J is acquired
( ) DIV_PDC4 to 0, DIV_PDCS2 to 0
= (00010011)2
Nothing is assigned.
HM84SEL ^{8/4 humming polarity}
selection bit
0 Normal
The 4-bit data of 8/4 humming is
1 _{reversal-outputted.}
××
Rev.2.10 Oct 25, 2006 Page 215 of 326
REJ03B0152-0210