M306H7MG-XXXFP Datasheet, PDF (286/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
17. FLASH MEMORY VERSION
FMR00 Bit
This bit indicates the operating status of the flash memory. The bit is “0” when the Program, Erase, or Lock Bit
program is running; otherwise, the bit is “1”.
FMR01 Bit
The microcomputer is made ready to accept commands by setting the FMR01 bit to “1” (CPU rewrite mode).
During boot mode, make sure the FMR05 bit also is “1” (user ROM area access).
FMR02 Bit
The lock bit set for each block can be disabled by setting the FMR02 bit to “1” (lock bit disabled). (Refer to the
description of the data protect function.) The lock bits set are enabled by setting the FMR02 bit to “0”.
The FMR02 bit only disables the lock bit function and does not modify the lock bit data (lock bit status flag).
However, if the Erase command is executed while the FMR02 bit is set to “1”, the lock bit data changes state
from “0” (locked) to “1” (unlocked) after Erase is completed.
FMSTP Bit
This bit is provided for initializing the flash memory control circuits, as well as for reducing the amount of
current consumed in the flash memory. The internal flash memory is disabled against access by setting the
FMSTP bit to “1”. Therefore, make sure the FMSTP bit is modified in other than the flash memory.
In the following cases, set the FMSTP bit to “1”:
• . When flash memory access resulted in an error while erasing or programming in EW0 mode (FMR00 bit
not reset to “1” (ready))
• . When entering low power mode
Figure 17.7 shows a flow chart to be followed before and after entering low power mode.
Note that when going to stop or wait mode, the FMR0 register does not need to be set because the power for the
internal flash memory is automatically turned off and is turned back on again after returning from stop or wait
mode.
FMR05 Bit
This bit switches between the boot ROM and user ROM areas during boot mode. Set this bit to “0” when
accessing the boot ROM area (for read) or “1” (user ROM access) when accessing the user ROM area (for read,
write, or erase).
FMR06 Bit
This is a read-only bit indicating the status of auto program operation. The bit is set to “1” when a program error
occurs; otherwise, it is cleared to “0”. For details, refer to the description of the full status check.
FMR07 Bit
This is a read-only bit indicating the status of auto erase operation. The bit is set to “1” when an erase error
occurs; otherwise, it is cleared to “0”. For details, refer to the description of the full status check.
Figure 17.5 and 17.6 show the setting and resetting of EW0 mode and EW1 mode, respectively.
FMR11 Bit
Setting this bit to “1” places the microcomputer in EW1 mode.
FMR16 Bit
This is a read-only bit indicating the execution result of the Read Lock Bit Status command.
Rev.2.10 Oct 25, 2006 Page 286 of 326
REJ03B0152-0210