M306H7MG-XXXFP Datasheet, PDF (56/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
6. INTERRUPTS
Priority level of each interrupt
INT1
Timer B2/Clock Timer
Level 0 (initial value)
Timer B0
Timer A3
Timer A1
Timer B4/Remote control,
UART1 bus collision
INT3
INT2/Remote control transmission
INT0
Timer B1
Timer A4/Multi-master I²C
Timer A2
Timer B3/HINT, UART0 bus collision
Timer B5/SLICEON
UART1 reception, ACK1
UART0 reception, ACK0
UART2 reception, ACK2
A/D conversion
DMA1
UART 2 bus collision
SI/O4, INT5
Timer A0
UART1 transmission, NACK1
UART0 transmission, NACK0
UART2 transmission, NACK2
DMA0
SI/O3, INT4
IPL
I flag
Address match
Watchdog timer
DBC
NMI
High
Priority of peripheral function interrupts
(if priority levels are same)
Low
Interrupt request level resolution output
to clock generating circuit (Fig.4.1)
Interrupt
request
accepted
Figure 6.9 Interrupts Priority Select Circuit
Rev.2.10 Oct 25, 2006 Page 56 of 326
REJ03B0152-0210