M306H7MG-XXXFP Datasheet, PDF (312/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
19. USAGE NOTES
• Changing the IR bit
Depending on the instruction used, the IR bit may not always be cleared to “0” (interrupt not requested).
Therefore, be sure to use the MOV instruction to clear the IR bit.
(3) When using the I flag to disable an interrupt, refer to the sample program fragments shown below as
you set the I flag. (Refer to (2) for details about rewrite the interrupt control registers in the sample
program fragments.)
Examples 1 through 3 show how to prevent the I flag from being set to “1” (interrupts enabled) before the
interrupt control register is rewrited, owing to the effects of the internal bus and the instruction queue buffer.
Example 1: Using the NOP instruction to keep the program waiting until the interrupt control
register is modified
INT_SWITCH1:
FCLR I
AND.B #00h, 0055h
NOP ;
NOP
FSET I
; Disable interrupts.
; Set the TA0IC register to “0016”.
; Enable interrupts.
The number of NOP instruction is as follows.
PM20=1(1 wait) : 2, PM20=0(2 wait) : 3, when using HOLD function : 4.
Example 2: Using the dummy read to keep the FSET instruction waiting
INT_SWITCH2:
FCLR I
AND.B #00h, 0055h
MOV.W MEM, R0
FSET I
; Disable interrupts.
; Set the TA0IC register to “0016”.
; Dummy read.
; Enable interrupts.
Example3: Using the POPC instruction to changing the I flag
INT_SWITCH3:
PUSHC FLG
FCLR I
AND.B #00h, 0055h
POPC FLG
; Disable interrupts.
; Set the TA0IC register to “0016”.
; Enable interrupts.
• Watchdog Timer Interrupt
Initialize the watchdog timer after the watchdog timer interrupt occurs.
Rev.2.10 Oct 25, 2006 Page 312 of 326
REJ03B0152-0210