M306H7MG-XXXFP Datasheet, PDF (61/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
CPU
clock
HOLD
Prescaler
1/16
CM07 = 0
WDC7 = 0
1/128
CM07 = 0
WDC7 = 1
CM07 = 1
1/2
Write to WDTS register
RESET
Figure 7.1 Watchdog Timer Block Diagram
7. WATCHDOG TIMER
Watchdog timer
Set to
“7FFF16”
PM12 = 0
Watchdog timer
interrupt request
PM12 = 1
Reset
Watchdog timer control register
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
WDC
Address
After reset
000F16 00XXXXXX2(Note2)
Bit symbol
Bit name
Function
RW
(b4-b0)
High-order bit of watchdog timer
RO
WDC5
Cold start / warm start
0 : Cold start
discrimination flag (Note 1) 1 : Warm start
RW
(b6)
Reserved bit
Must set to “0”
RW
WDC7
Prescaler select bit
0 : Divided by 16
1 : Divided by 128
RW
Note 1: The WDC5 bit is always “1” (warm start) no matter how it is set by writing a “0” or “1”.
Note 2: The WDC5 bit is “0” (cold start) immediately after power-on. It can only be set to “1” in a program.
Watchdog timer start register (Note)
b7
b0
Symbol
WDTS
Address
000E16
After reset
Indeterminate
Function
RW
The watchdog timer is initialized and starts counting after a write instruction to
this register. The watchdog timer value is always initialized to “7FFF16”
WO
regardless of whatever value is written.
Note : Write to the WDTS register after the watchdog timer interrupt occurs.
Figure 7.2 WDC Register and WDTS Register
Rev.2.10 Oct 25, 2006 Page 61 of 326
REJ03B0152-0210