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M306H7MG-XXXFP Datasheet, PDF (47/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER
M306H7MG-XXXFP/MC-XXXFP/FGFP
6. INTERRUPTS
• Relocatable Vector Tables
The 256 bytes beginning with the start address set in the INTB register comprise a reloacatable vector table
area. Table 6.2 lists the relocatable vector tables. Setting an even address in the INTB register results in the
interrupt sequence being executed faster than in the case of odd addresses.
Table 6.2 Relocatable Vector Tables
Interrupt source
Vector address (Note 1)
Address (L) to address (H)
Software interrupt
number
Reference
BRK instruction (Note 5)
(Reserved)
INT3
Timer B5/SLICE ON (Note 7)
Timer B4/Remote control, UART1 bus
collision detect (Note 4, Note 6, Note 7)
Timer B3/HINT, UART0 bus collision
detect (Note 4, Note 6, Note 7)
SI/O4, INT5 (Note 2)
SI/O3, INT4 (Note 2)
UART 2 bus collision detection
DMA0
DMA1
+0 to +3 (000016 to 000316)
+16 to +19 (001016 to 001316)
+20 to +23 (001416 to 001716)
+24 to +27 (001816 to 001B16)
+28 to +31 (001C16 to 001F16)
+32 to +35 (002016 to 002316)
+36 to +39 (002416 to 002716)
+40 to +43 (002816 to 002B16)
+44 to +47 (002C16 to 002F16)
+48 to +51 (003016 to 003316)
0
1 to 3
4
5
6
7
8
9
10
11
12
M16C/60, M16C/20
series software
manual
INT interrupt
Timer
Timer
Serial I/O
INT interrupt
Serial I/O
Serial I/O
DMAC
A/D
+56 to +59 (003816 to 003B16)
14
A/D converter
UART2 transmit, NACK2 (Note 3)
+60 to +63 (003C16 to 003F16)
15
UART2 receive, ACK2 (Note 3)
+64 to +67 (004016 to 004316)
16
UART0 transmit, NACK0(Note 3)
+68 to +71 (004416 to 004716)
17
Serial I/O
UART0 receive, ACK0 (Note 3)
+72 to +75 (004816 to 004B16)
18
UART1 transmit, NACK1(Note 3)
+76 to +79 (004C16 to 004F16)
19
UART1 receive, ACK1(Note 3)
+80 to +83 (005016 to 005316)
20
Timer A0
+84 to +87 (005416 to 005716)
21
Timer A1
+88 to +91 (005816 to 005B16)
22
Timer A2
+92 to +95 (005C16 to 005F16)
23
Timer A3
+96 to +99 (006016 to 006316)
24
Timer A4/Multi-master I2C (Note 9) +100 to +103 (006416 to 006716)
25
Timer
Timer B0
+104 to +107 (006816 to 006B16)
26
Timer B1
+108 to +111 (006C16 to 006F16)
27
Timer B2/Clock timer (Note 7)
+112 to +115 (007016 to 007316)
28
INT0
+116 to +119 (007416 to 007716)
29
INT1
+120 to +123 (007816 to 007B16)
30
INT2/Remote control transmission (Note 8) +124 to +127 (007C16 to 007F16)
31
Software interrupt (Note 5)
+128 to +131 (008016 to 008316)
32
to
to
+252 to +255 (00FC16 to 00FF16)
63
INT interrupt
M16C/60, M16C/20
series software
manual
Notes 1: Address relative to address in INTB.
Notes 2: Use the IFSR register's IFSR6 and IFSR7 bits to select.
Notes 3: During I2C mode, NACK and ACK interrupts comprise the interrupt source.
Notes 4: Use the IFSR2A register’s IFSR26 and IFSR27 bits to select.
Notes 5: These interrupts cannot be disabled using the I flag.
Notes 6: Bus collision detection : During IE mode, this bus collision detection constitutes the cause of an interrupt.
During I2C mode, however, a start condition or a stop condition detection
constitutes the cause of an interrupt.
Notes 7: When you use SLICEON, remote control, HINT and clock timer interruption, refer to address 3616 expansion
register of “14. Expansion Function”
Notes 8: Please refer to address 3E16 of the expansion register of “14. Expansion Function” when you use the remote
control transmission interrupt.
Notes 9: Please refer to the I2C0 interrupt control register of “11 multi-master I2C-BUS interface” (address 02D616) when
you use multi master I2C interrupt.
Rev.2.10 Oct 25, 2006 Page 47 of 326
REJ03B0152-0210