M306H7MG-XXXFP Datasheet, PDF (287/329 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H7MG-XXXFP/MC-XXXFP/FGFP
17. FLASH MEMORY VERSION
Flash memory control register 0
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
FMR0
Address
01B716
After reset
XX0000012
Bit symbol
Bit name
Function
RW
FMR00 RY/BY status flag
0: Busy (being written or erased)
1: Ready
RO
FMR01 ^{CPU rewrite mode select bit 0: Disables CPU rewrite mode}
(Note 1)
1: Enables CPU rewrite mode
RW
FMR02
Lock bit disable select bit
(Note 2)
0: Enables lock bit
1: Disables lock bit
RW
FMSTP ^{Flash memory stop bit}
(Note 3, Note 5))
0: Enables flash memory operation
1: Stops flash memory operation
(placed in low power mode,
RW
flash memory initialized)
(b4)
Reserved bit
Must always be set to “0”
RW
FMR05 ^{User ROM area select bit}
0: Boot ROM area is accessed
(Note 3)
1: User ROM area is accessed
RW
(Effective in only boot mode)
FMR06
Program status flag (Note 4)
0: Terminated normally
1: Terminated in error
RO
FMR07 Erase status flag (Note 4)
0: Terminated normally
1: Terminated in error
RO
Note 1: To set this bit to “1”, write “0” and then “1” in succession. Make sure no interrupts or DMA transfers
will occur before writing “1” after writing “0”.
Write to this bit when the NMI pin is in the high state. Also, while in EW0 mode, modify this bit in other
than the flash memory.
Note 2: To set this bit to “1”, write “0” and then “1” in succession when the FMR01 bit = 1. Make sure no
interrupts or no DMA transfers will occur before writing “1” after writing “0”.
Note 3: modify this bit in other than the flash memory.
Note 4: This flag is cleared to “0” by executing the Clear Status command.
Note 5: Effective when the FMR01 bit = 1 (CPU rewrite mode). If the FMR01 bit = 0, although the FMSTP bit
can be set to “1” by writing “1” in a program, the flash memory is neither placed in low power mode
nor initialized.
Note 6: This status includes writing or reading with the Lock Bit Program or Read Lock Bit Status command.
Flash memory control register 1
b7 b6 b5 b4 b3 b2 b1 b0
0 00
0
Symbol
FMR1
Address
01B516
After reset
0X00XX0X2
Bit symbol
Bit name
Function
RW
(b0)
Reserved bit
The value in this bit when read is
RO
indeterminate.
FMR11 EW1 mode select bit (Note)
0: EW0 mode
1: EW1 mode
RW
(b3-b2) ^{Reserved bit}
The value in this bit when read is
indeterminate.
RO
(b5-b4) ^{Reserved bit}
Must always be set to “0”
RW
FMR16 Lock bit status flag
0: Lock
1: Unlock
RO
(b7)
Reserved bit
Must always be set to “0”
RW
Note : To set this bit to “1”, write “0” and then “1” in succession when the FMR01 bit = 1. Make sure no
interrupts or no DMA transfers will occur before writing “1” after writing “0”. Write this bit in the state
the NMI pin = “H”. The FMR01 and FMR11 bits both are cleared to “0” by setting the FMR01 bit to “0”.
Figure 17.4 FMR0 and FMR1 Registers
Rev.2.10 Oct 25, 2006 Page 287 of 326
REJ03B0152-0210