PIC18F97J60_11 Datasheet, PDF (85/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
6.2.3
INSTRUCTIONS IN PROGRAM
MEMORY
The program memory is addressed in bytes. Instruc-
tions are stored as two bytes or four bytes in program
memory. The Least Significant Byte (LSB) of an
instruction word is always stored in a program memory
location with an even address (LSb = 0). To maintain
alignment with instruction boundaries, the PC incre-
ments in steps of 2 and the LSb will always read ‘0’ (see
Section 6.1.5 “Program Counter”).
Figure 6-6 shows an example of how instruction words
are stored in the program memory.
The CALL and GOTO instructions have the absolute
program memory address embedded into the instruction.
Since instructions are always stored on word boundaries,
the data contained in the instruction is a word address.
The word address is written to PC<20:1> which
accesses the desired byte address in program memory.
Instruction #2 in Figure 6-6 shows how the instruction,
GOTO 0006h, is encoded in the program memory.
Program branch instructions, which encode a relative
address offset, operate in the same manner. The offset
value stored in a branch instruction represents the
number of single-word instructions that the PC will be
offset by. Section 26.0 “Instruction Set Summary”
provides further details of the instruction set.
FIGURE 6-6:
INSTRUCTIONS IN PROGRAM MEMORY
Program Memory
Byte Locations 
LSB = 1
Instruction 1: MOVLW
055h
0Fh
Instruction 2: GOTO
0006h
EFh
F0h
Instruction 3: MOVFF
123h, 456h
C1h
F4h
LSB = 0
55h
03h
00h
23h
56h
Word Address

000000h
000002h
000004h
000006h
000008h
00000Ah
00000Ch
00000Eh
000010h
000012h
000014h
6.2.4 TWO-WORD INSTRUCTIONS
The standard PIC18 instruction set has four, two-word
instructions: CALL, MOVFF, GOTO and LSFR. In all
cases, the second word of the instructions always has
‘1111’ as its four Most Significant bits (MSbs); the other
12 bits are literal data, usually a data memory address.
The use of ‘1111’ in the 4 MSbs of an instruction
specifies a special form of NOP. If the instruction is
executed in proper sequence, immediately after the
first word, the data in the second word is accessed and
used by the instruction sequence. If the first word is
skipped, for some reason, and the second word is
executed by itself, a NOP is executed instead. This is
necessary for cases when the two-word instruction is
preceded by a conditional instruction that changes the
PC. Example 6-4 shows how this works.
Note:
See Section 6.5 “Program Memory and
the Extended Instruction Set” for
information on two-word instructions in
the extended instruction set.
EXAMPLE 6-4: TWO-WORD INSTRUCTIONS
CASE 1:
Object Code
Source Code
0110 0110 0000 0000 TSTFSZ
REG1
1100 0001 0010 0011 MOVFF
REG1, REG2
1111 0100 0101 0110
0010 0100 0000 0000 ADDWF
REG3
CASE 2:
Object Code
Source Code
0110 0110 0000 0000 TSTFSZ
REG1
1100 0001 0010 0011 MOVFF
REG1, REG2
1111 0100 0101 0110
0010 0100 0000 0000 ADDWF
REG3
; is RAM location 0?
; No, skip this word
; Execute this word as a NOP
; continue code
; is RAM location 0?
; Yes, execute this word
; 2nd word of instruction
; continue code
 2011 Microchip Technology Inc.
DS39762F-page 85