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| PIC18F97J60_11 Datasheet, PDF (15/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet | |||
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PIC18F97J60 FAMILY
FIGURE 1-1:
PIC18F66J60/66J65/67J60 (64-PIN) BLOCK DIAGRAM
Table Pointer<21>
inc/dec logic
21
20
Address Latch
Program Memory
(64, 96, 128 Kbytes)
Data Latch
8
Data Bus<8>
88
PCLATU PCLATH
PCU PCH PCL
Program Counter
31 Level Stack
STKPTR
Table Latch
Data Latch
Data Memory
(3808 Bytes)
Address Latch
12
Data Address<12>
4
BSR
12
FSR0
FSR1
FSR2
4
Access
Bank
12
inc/dec
logic
ROM Latch
Instruction Bus <16>
IR
Address
Decode
OSC2/CLKO Timing
OSC1/CLKI Generation
INTRC
Oscillator
ENVREG
Precision
Band Gap
Reference
Voltage
Regulator
Instruction
Decode and
Control
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset(2)
State Machine
Control Signals
8
PRODH PRODL
3
BITOP
8
8 x 8 Multiply
8
W
8
8
8
8
ALU<8>
8
VDDCORE/VCAP VDD,VSS
MCLR
PORTA
RA0:RA5(1)
PORTB
RB0:RB7(1)
PORTC
RC0:RC7(1)
PORTD
RD0:RD2(1)
PORTE
RE0:RE5(1)
PORTF
RF1:RF7(1)
PORTG
RG4(1)
ADC
10-Bit
Timer0
Timer1
Timer2
Timer3
Timer4
Comparators
ECCP1
ECCP2 ECCP3
CCP4
CCP5
MSSP1
EUSART1 Ethernet
Note 1: See Table 1-4 for I/O port pin descriptions.
2: BOR functionality is provided when the on-board voltage regulator is enabled.
ï£ 2011 Microchip Technology Inc.
DS39762F-page 15
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