PIC18F97J60_11 Datasheet, PDF (202/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

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18.2 Capture and Compare Modes
Except for the operation of the Special Event Trigger
discussed below, the Capture and Compare modes of
the ECCPx modules are identical in operation to that of
CCP4. These are discussed in detail in Section 17.2
“Capture Mode” and Section 17.3 “Compare
Mode”.
18.2.1 SPECIAL EVENT TRIGGER
ECCP1 and ECCP2 incorporate an internal hardware
trigger that is generated in Compare mode on a match
between the CCPRx register pair and the selected
timer. This can be used, in turn, to initiate an action.
This mode is selected by setting CCPxCON<3:0> to
‘1011’.
The Special Event Trigger output of either ECCP1 or
ECCP2 resets the TMR1 or TMR3 register pair,
depending on which timer resource is currently
selected. This allows the CCPRx register to effectively
be a 16-Bit Programmable Period register for Timer1 or
Timer3. In addition, the ECCP2 Special Event Trigger
will also start an A/D conversion if the A/D module is
enabled.
Special Event Triggers are not implemented for
ECCP3, CCP4 or CCP5. Selecting the Special Event
Trigger mode for these modules has the same effect as
selecting the Compare with Software Interrupt mode
(CCPxM<3:0> = 1010).
Note:
The Special Event Trigger from ECCP2
will not set the Timer1 or Timer3 interrupt
flag bits.
18.3 Standard PWM Mode
When configured in Single Output mode, the ECCPx
modules function identically to the standard CCPx
modules in PWM mode, as described in Section 17.4
“PWM Mode”. Sometimes this is also referred to as
“Compatible CCP” mode, as in Tables 18-1
through 18-3.
Note:
When setting up single output PWM
operations, users are free to use either of
the processes described in Section 17.4.3
“Setup for PWM Operation” or
Section 18.4.9 “Setup for PWM Opera-
tion”. The latter is more generic but will
work for either single or multi-output PWM.
DS39762F-page 202
 2011 Microchip Technology Inc.