PIC18F97J60_11 Datasheet, PDF (38/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
TABLE 1-6: PIC18F96J60/96J65/97J60 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number _{Pin Buffer}
TQFP
Type Type
Description
RF0/AN5
RF0
AN5
PORTF is a bidirectional I/O port.
12
I/O
ST
Digital I/O.
I Analog Analog Input 5.
RF1/AN6/C2OUT
RF1
AN6
C2OUT
28
I/O
ST
Digital I/O.
I Analog Analog Input 6.
O
—
Comparator 2 output.
RF2/AN7/C1OUT
RF2
AN7
C1OUT
23
I/O
ST
Digital I/O.
I Analog Analog Input 7.
O
—
Comparator 1 output.
RF3/AN8
RF3
AN8
22
I/O
ST
Digital I/O.
I Analog Analog Input 8.
RF4/AN9
RF4
AN9
21
I/O
ST
Digital I/O.
I Analog Analog Input 9.
RF5/AN10/CVREF
RF5
AN10
CVREF
20
I/O
ST
Digital I/O.
I Analog Analog Input 10.
O
—
Comparator reference voltage output.
RF6/AN11
RF6
AN11
19
I/O
ST
Digital I/O.
I Analog Analog Input 11.
RF7/SS1
RF7
SS1
Legend:
Note 1:
2:
3:
4:
5:
18
I/O
ST
Digital I/O.
I
TTL
SPI slave select input.
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
OD
= Open-Drain (no P diode to VDD)
Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Extended Microcontroller mode).
Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX Configuration bit is set).
Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Microcontroller mode).
Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
DS39762F-page 38
 2011 Microchip Technology Inc.