PIC18F97J60_11 Datasheet, PDF (112/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
EXAMPLE 7-3: WRITING TO FLASH PROGRAM MEMORY
MOVLW CODE_ADDR_UPPER ; Load TBLPTR with the base
MOVWF TBLPTRU
; address of the memory block
MOVLW CODE_ADDR_HIGH
MOVWF TBLPTRH
MOVLW CODE_ADDR_LOW
MOVWF TBLPTRL
ERASE_BLOCK
BSF
EECON1, WREN
; enable write to memory
BSF
EECON1, FREE
; enable Row Erase operation
BCF
INTCON, GIE
; disable interrupts
MOVLW 55h
MOVWF EECON2
; write 55h
MOVLW 0AAh
MOVWF EECON2
; write 0AAh
BSF
EECON1, WR
; start erase (CPU stall)
BSF
INTCON, GIE
; re-enable interrupts
MOVLW D'16'
MOVWF WRITE_COUNTER
; Need to write 16 blocks of 64 to write
; one erase block of 1024
RESTART_BUFFER
MOVLW D'64'
MOVWF COUNTER
MOVLW BUFFER_ADDR_HIGH ; point to buffer
MOVWF FSR0H
MOVLW BUFFER_ADDR_LOW
MOVWF FSR0L
FILL_BUFFER
...
; read the new data from I2C, SPI,
; PSP, USART, etc.
WRITE_BUFFER
MOVLW D’64
; number of bytes in holding register
MOVWF COUNTER
WRITE_BYTE_TO_HREGS
MOVFF POSTINC0, WREG
; get low byte of buffer data
MOVWF TABLAT
; present data to table latch
TBLWT+*
; write data, perform a short write
; to internal TBLWT holding register.
DECFSZ COUNTER
; loop until buffers are full
BRA
WRITE_BYTE_TO_HREGS
PROGRAM_MEMORY
BSF
EECON1, WREN
; enable write to memory
BCF
INTCON, GIE
; disable interrupts
MOVLW 55h
Required
MOVWF EECON2
; write 55h
Sequence
MOVLW 0AAh
MOVWF EECON2
; write 0AAh
BSF
EECON1, WR
; start program (CPU stall)
BSF
INTCON, GIE
; re-enable interrupts
BCF
EECON1, WREN
; disable write to memory
DECFSZ WRITE_COUNTER
BRA
RESTART_BUFFER
; done with one write cycle
; if not done replacing the erase block
DS39762F-page 112
 2011 Microchip Technology Inc.