PIC18F97J60_11 Datasheet, PDF (218/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
19.1 Physical Interfaces and External
Connections
19.1.1 SIGNAL AND POWER INTERFACES
PIC18F97J60 family devices all provide a dedicated
4-pin signal interface for the Ethernet module. No other
microcontroller or peripheral functions are multiplexed
with these pins, so potential device configuration
conflicts do not need to be considered. The pins are:
• TPIN+: Differential plus twisted-pair input
• TPIN-: Differential minus twisted-pair input
• TPOUT+: Differential plus twisted-pair output
• TPOUT-: Differential minus twisted-pair output
No provisions are made for providing or receiving
digital Ethernet data from an external Ethernet PHY.
In addition to the signal connections, the Ethernet mod-
ule has its own independent voltage source and ground
connections for the PHY module. Separate connections
are provided for the receiver (VDDRX and VSSRX), the
transmitter (VDDTX and VSSTX) and the transmitter’s
internal PLL (VDDPLL and VSSPLL). Although the voltage
requirements are the same as VDD and VSS for the
microcontroller, the pins are not internally connected.
For the Ethernet module to operate properly, supply
voltage and ground must be connected to these pins. All
of the microcontroller’s power and ground supply pins
should be externally connected to the same power
source or ground node, with no inductors or other filter
components between the microcontroller and Ethernet
module’s VDD pins.
Besides the independent voltage connections, the PHY
module has a separate bias current input pin, RBIAS. A
bias current, derived from an external resistor, must be
applied to RBIAS for proper transceiver operation.
19.1.2 LED CONFIGURATION
The PHY module provides separate outputs to drive the
standard Ethernet indicators, LEDA and LEDB. The LED
outputs are multiplexed with PORTA pins, RA0 and RA1.
Their use as LED outputs is enabled by setting the Con-
figuration bit, ETHLED (Register 25-6, CONFIG3H<2>).
When configured as LED outputs, RA0/LEDA and
RA1/LEDB have sufficient drive capacity (up to 25 mA)
to directly power the LEDs. The pins must always be
configured to supply (source) current to the LEDs. Users
must also configure the pins as outputs by clearing
TRISA<1:0>.
The LEDs can be individually configured to
automatically display link status, RX/TX activity, etc. A
configurable stretch capability prolongs the LED blink
duration for short events, such as a single packet
transmit, allowing human perception. The options are
controlled by the PHLCON register (Register 19-13).
Typical values for blink stretch are listed in Table 19-1.
TABLE 19-1: LED BLINK STRETCH
LENGTH
Stretch Length
Typical Stretch (ms)
TNSTRCH (normal)
40
TMSTRCH (medium)
70
TLSTRCH (long)
140
19.1.3 OSCILLATOR REQUIREMENTS
The Ethernet module is designed to operate at 25 MHz.
This is provided by the primary microcontroller clock,
either with a 25 MHz crystal connected to the OSC1
and OSC2 pins or an external clock source connected
to the OSC1 pin. No provision is made to clock the
module from a different source.
To maintain the required clock frequency, the microcon-
troller can operate only from the primary oscillator
source (PRI_RUN or PRI_IDLE modes) while the
Ethernet module is enabled. Using any other
power-managed mode will require that the Ethernet
module be disabled.
19.1.3.1 Start-up Timer
The Ethernet module contains a start-up timer,
independent of the microcontroller’s OST, to ensure
that the PHY module’s PLL has stabilized before
operation. Clearing the module enable bit, ETHEN
(ECON2<5>), clears the PHYRDY status bit
(ESTAT<0>). Setting the ETHEN bit causes this
start-up timer to start counting. When the timer expires,
after 1 ms, the PHYRDY bit will be automatically set.
After enabling the module by setting the ETHEN bit, the
application software should always poll PHYRDY to
determine when normal Ethernet operation can begin.
DS39762F-page 218
 2011 Microchip Technology Inc.