PIC18F97J60_11 Datasheet, PDF (475/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
APPENDIX A: REVISION HISTORY
Revision A (March 2006)
Original data sheet for the PIC18F97J60 family of
devices.
Revision B (October 2006)
First revision. Includes preliminary electrical specifica-
tions; revised and updated material on the Ethernet
module; updated material on Reset integration; and
updates to the device memory map.
Revision C (June 2007)
Corrected Table 10.2: Input Voltage Levels; added con-
tent on Ethernet module’s reading and writing to the
buffer; added new, 100-lead PT 12x12x1 mm TQFP
package to “Package Marking Information” and “Pack-
age Details” sections; updated other package details
drawings; changed Product Identification System
examples.
Revision D (January 2008)
Added one line to “Ethernet Features” description.
Added land pattern schematics for each package.
Revision E (October 2009)
Updated to remove Preliminary status.
Revision F (April 2011)
Added Brown-out Reset (BOR) specs, added Ethernet
RX Auto-Polarity circuit section, added EMI filter
section, added Section 2.0 “Guidelines for Getting
Started with PIC18FJ Microcontrollers”, changed
the opcode encoding of the PUSHL instruction to
1110 1010 kkk kkkk and changed the 2 TOSC
Maximum Device Frequency in Table 22-1 from
2.68 MHz to the correct value of 2.86 MHz. Updated
comparator input offset voltage maximum to the correct
value of 25 mV.
 2011 Microchip Technology Inc.
DS39762F-page 475