PIC18F97J60_11 Datasheet, PDF (52/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
TABLE 3-2: DEVICE CLOCK SPEEDS FOR VARIOUS PLL BLOCK CONFIGURATIONS
5x PLL
PLL Prescaler
PLL Postscaler
PLL Block
Configuration
(OSCTUNE<7:4>)
Clock Frequency
(MHz)
Disabled
x101
(Note 1)
2
2
1111
31.2500
Enabled
3
Disabled
0111
x100
20.8333
41.6667
3
2
1110
20.8333
3
0110
13.8889
Disabled⁽²⁾
Disabled
x00x
25 (Default)
Disabled
2
2
1011
6.2500
3
0011
4.1667
3
2
1010
4.1667
3
0010
2.7778
Legend: x = Don’t care
Note 1: Reserved configuration; represents a clock frequency beyond the microcontroller’s operating range.
2: The prescaler is automatically disabled when the PLL and postscaler are both disabled.
3.7 Clock Sources and Oscillator
Switching
The PIC18F97J60 family of devices includes a feature
that allows the device clock source to be switched from
the main oscillator to an alternate clock source. These
devices also offer two alternate clock sources. When
an alternate clock source is enabled, the various
power-managed operating modes are available.
Essentially, there are three clock sources for these
devices:
• Primary oscillators
• Secondary oscillators
• Internal oscillator block
The primary oscillators include the External Crystal
and Resonator modes and the External Clock modes.
The particular mode is defined by the FOSC<2:0>
Configuration bits. The details of these modes are
covered earlier in this chapter.
The secondary oscillators are those external sources
not connected to the OSC1 or OSC2 pins. These
sources may continue to operate even after the controller
is placed in a power-managed mode. The PIC18F97J60
family of devices offers the Timer1 oscillator as a second-
ary oscillator. In all power-managed modes, this oscillator
is often the time base for functions such as a Real-Time
Clock (RTC).
Most often, a 32.768 kHz watch crystal is connected
between the RC0/T1OSO/T13CKI and RC1/T1OSI
pins. Loading capacitors are also connected from each
pin to ground. The Timer1 oscillator is discussed in
greater detail in Section 13.3 “Timer1 Oscillator”.
In addition to being a primary clock source, the internal
oscillator is available as a power-managed mode
clock source. The INTRC source is also used as the
clock source for several special features, such as the
WDT and Fail-Safe Clock Monitor.
The clock sources for the PIC18F97J60 family devices
are shown in Figure 3-1. See Section 25.0 “Special
Features of the CPU” for Configuration register details.
DS39762F-page 52
 2011 Microchip Technology Inc.