PIC18F97J60_11 Datasheet, PDF (57/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
FIGURE 4-1:
TRANSITION TIMING FOR ENTRY TO SEC_RUN MODE
T1OSI
OSC1
CPU
Clock
Peripheral
Clock
Program
Counter
Q1 Q2 Q3 Q4 Q1
1
PC
2
3
n-1 n
Clock Transition
PC + 2
Q2 Q3 Q4 Q1 Q2 Q3
PC + 4
FIGURE 4-2:
TRANSITION TIMING FROM SEC_RUN MODE TO PRI_RUN MODE (HSPLL)
T1OSI
Q1
Q2
Q3
Q4
Q1
Q2 Q3 Q4 Q1 Q2 Q3
OSC1
PLL Clock
Output
CPU Clock
TOST⁽¹⁾
TPLL⁽¹⁾
1 2 n-1 n
Clock
Transition
Peripheral
Clock
Program
Counter
PC
PC + 2
PC + 4
SCS<1:0> bits Changed
OSTS bit Set
Note 1: TOST = 1024 TOSC; TPLL = 2 ms (approx). These intervals are not shown to scale.
 2011 Microchip Technology Inc.
DS39762F-page 57