PIC18F97J60_11 Datasheet, PDF(37/492 Page) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

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PIC18F97J60_11 Datasheet, PDF (37/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

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PIC18F97J60 FAMILY

TABLE 1-6: PIC18F96J60/96J65/97J60 PINOUT I/O DESCRIPTIONS (CONTINUED)

Pin Name

Pin Number Pin Buffer

TQFP

Type Type

Description

RE0/AD8/RD/P2D

RE0

AD8

RD

P2D

PORTE is a bidirectional I/O port.

4

I/O

ST

Digital I/O.

I/O

TTL

External Memory Address/Data 8.

I

TTL

Read control for Parallel Slave Port.

O

â

ECCP2 PWM Output D.

RE1/AD9/WR/P2C

RE1

AD9

WR

P2C

3

I/O

ST

Digital I/O.

I/O

TTL

External Memory Address/Data 9.

I

TTL

Write control for Parallel Slave Port.

O

â

ECCP2 PWM Output C.

RE2/AD10/CS/P2B

RE2

AD10

CS

P2B

98

I/O

ST

Digital I/O.

I/O

TTL

External Memory Address/Data 10.

I

TTL

Chip select control for Parallel Slave Port.

O

â

ECCP2 PWM Output B.

RE3/AD11/P3C

RE3

AD11

P3C(3)

97

I/O

ST

Digital I/O.

I/O

TTL

External Memory Address/Data 11.

O

â

ECCP3 PWM Output C.

RE4/AD12/P3B

RE4

AD12

P3B(3)

96

I/O

ST

Digital I/O.

I/O

TTL

External Memory Address/Data 12.

O

â

ECCP3 PWM Output B.

RE5/AD13/P1C

RE5

AD13

P1C(3)

95

I/O

ST

Digital I/O.

I/O

TTL

External Memory Address/Data 13.

O

â

ECCP1 PWM Output C.

RE6/AD14/P1B

RE6

AD14

P1B(3)

94

I/O

ST

Digital I/O.

I/O

TTL

External Memory Address/Data 14.

O

â

ECCP1 PWM Output B.

RE7/AD15/ECCP2/P2A

93

RE7

I/O

ST

Digital I/O.

AD15

I/O

TTL

External Memory Address/Data 15.

ECCP2(4)

I/O

ST

Capture 2 input/Compare 2 output/PWM2 output.

P2A(4)

O

â

ECCP2 PWM Output A.

Legend:

Note 1:

2:

3:

4:

5:

TTL = TTL compatible input

CMOS = CMOS compatible input or output

ST = Schmitt Trigger input with CMOS levels

Analog = Analog input

I = Input

O

= Output

P = Power

OD

= Open-Drain (no P diode to VDD)

Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Extended Microcontroller mode).

Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX Configuration bit is set).

Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).

Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Microcontroller mode).

Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).

ï£ 2011 Microchip Technology Inc.

DS39762F-page 37

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