PIC18F97J60_11 Datasheet, PDF (191/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
17.2 Capture Mode
In Capture mode, the CCPRxH:CCPRxL register pair
captures the 16-bit value of the TMR1 or TMR3
registers when an event occurs on the corresponding
CCPx pin. An event is defined as one of the following:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
The event is selected by the mode select bits,
CCPxM<3:0> (CCPxCON<3:0>). When a capture is
made, the interrupt request flag bit, CCPxIF, is set; it
must be cleared in software. If another capture occurs
before the value in register, CCPRx, is read, the old
captured value is overwritten by the new captured value.
17.2.1 CCPx PIN CONFIGURATION
In Capture mode, the appropriate CCPx pin should be
configured as an input by setting the corresponding
TRIS direction bit.
Note:
If RG4/CCP5/P1D is configured as an
output, a write to the port can cause a
capture condition.
17.2.2 TIMER1/TIMER3 MODE SELECTION
The timers that are to be used with the capture feature
(Timer1 and/or Timer3) must be running in Timer mode or
Synchronized Counter mode. In Asynchronous Counter
mode, the capture operation will not work. The timer to be
used with each CCPx module is selected in the T3CON
register (see Section 17.1.1 “CCPx/ECCPx Modules
and Timer Resources”).
17.2.3 SOFTWARE INTERRUPT
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit clear to avoid false
interrupts. The interrupt flag bit, CCPxIF, should also be
cleared following any such change in operating mode.
17.2.4 CCPx PRESCALER
There are four prescaler settings in Capture mode.
They are specified as part of the operating mode
selected by the mode select bits (CCPxM<3:0>).
Whenever the CCPx module is turned off or Capture
mode is disabled, the prescaler counter is cleared. This
means that any Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler. Example 17-1 shows the
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 17-1:
CHANGING BETWEEN
CAPTURE PRESCALERS
(CCP5 SHOWN)
CLRF
MOVLW
MOVWF
CCP5CON
; Turn CCP module off
NEW_CAPT_PS ; Load WREG with the
; new prescaler mode
; value and CCP ON
CCP5CON
; Load CCP5CON with
; this value
FIGURE 17-2:
CAPTURE MODE OPERATION BLOCK DIAGRAM
CCP4 Pin
Prescaler
 1, 4, 16
Set CCP4IF
T3CCP2
and
Edge Detect
T3CCP2
CCP4CON<3:0> ⁴
Q1:Q4 ⁴
CCP5CON<3:0> ⁴
Set CCP5IF
T3CCP1
T3CCP2
CCP5 Pin
Prescaler
 1, 4, 16
and
Edge Detect
T3CCP2
T3CCP1
TMR3H TMR3L
TMR3
Enable
CCPR4H
TMR1
Enable
CCPR4L
TMR1H TMR1L
TMR3H TMR3L
TMR3
Enable
CCPR5H CCPR5L
TMR1
Enable
TMR1H TMR1L
 2011 Microchip Technology Inc.
DS39762F-page 191