PIC18F97J60_11 Datasheet, PDF (480/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
Transmitting and Receiving Data ............................. 247
Packet Field Definitions ........................... 247–248
Reading Received Packets .............................. 253
Receive Buffer Space ...................................... 254
Receive Packet Layout .................................... 252
Receive Status Vectors .................................... 253
Receiving Packets ........................................... 252
Transmit Packet Layout ................................... 250
Transmit Status Vectors ................................... 251
Transmitting Packets ....................................... 249
Ethernet Operation, Microcontroller Clock ......................... 51
EUSARTx
Asynchronous Mode ................................................ 325
Associated Registers, Receive ........................ 329
Associated Registers, Transmit ....................... 327
Auto-Wake-up on Sync Break Character ......... 330
Break Character Sequence .............................. 332
Receiving ................................................. 332
Receiver ........................................................... 328
Setting Up 9-Bit Mode with Address Detect ..... 328
Transmitter ....................................................... 325
Baud Rate Generator
Operation in Power-Managed Modes .............. 319
Baud Rate Generator (BRG) .................................... 319
Associated Registers ....................................... 320
Auto-Baud Rate Detect .................................... 323
Baud Rates, Asynchronous Modes .................. 321
High Baud Rate Select (BRGH Bit) .................. 319
Sampling .......................................................... 319
Synchronous Master Mode ...................................... 333
Associated Registers, Receive ........................ 336
Associated Registers, Transmit ....................... 334
Reception ......................................................... 335
Transmission .................................................... 333
Synchronous Slave Mode ........................................ 337
Associated Registers, Receive ........................ 338
Associated Registers, Transmit ....................... 337
Reception ......................................................... 338
Transmission .................................................... 337
Extended Instruction Set
ADDFSR .................................................................. 418
ADDULNK ................................................................ 418
CALLW ..................................................................... 419
MOVSF .................................................................... 419
MOVSS .................................................................... 420
PUSHL ..................................................................... 420
SUBFSR .................................................................. 421
SUBULNK ................................................................ 421
External Clock Input (EC Modes) ....................................... 50
External Memory Bus ....................................................... 115
16-Bit Byte Select Mode .......................................... 121
16-Bit Byte Write Mode ............................................ 119
16-Bit Data Width Modes ......................................... 118
16-Bit Mode Timing .................................................. 122
16-Bit Word Write Mode ........................................... 120
21-Bit Addressing ..................................................... 117
8-Bit Data Width Mode ............................................. 123
8-Bit Mode Timing .................................................... 124
Address and Data Line Usage (table) ...................... 117
Address and Data Width .......................................... 117
Address Shifting ....................................................... 117
Control ..................................................................... 116
I/O Port Functions .................................................... 115
Operation in Power-Managed Modes ...................... 125
Program Memory Modes ......................................... 118
Extended Microcontroller ................................. 118
Microcontroller ................................................. 118
Wait States .............................................................. 118
Weak Pull-ups on Port Pins ..................................... 118
F
Fail-Safe Clock Monitor ........................................... 359, 371
and the Watchdog Timer ......................................... 371
Exiting Operation ..................................................... 371
Interrupts in Power-Managed Modes ....................... 372
POR or Wake-up From Sleep .................................. 372
Fast Register Stack ........................................................... 83
Firmware Instructions ...................................................... 375
Flash Configuration Words ........................................ 78, 359
Flash Program Memory ................................................... 105
Associated Registers ............................................... 113
Control Registers ..................................................... 106
EECON1 and EECON2 ................................... 106
TABLAT (Table Latch) ..................................... 108
TBLPTR (Table Pointer) .................................. 108
Erase Sequence ...................................................... 110
Erasing .................................................................... 110
Operation During Code-Protect ............................... 113
Reading ................................................................... 109
Table Pointer
Boundaries Based on Operation ..................... 108
Table Pointer Boundaries ........................................ 108
Table Reads and Table Writes ................................ 105
Write Sequence ....................................................... 111
Writing ..................................................................... 111
Protection Against Spurious Writes ................. 113
Unexpected Termination ................................. 113
Write Verify ...................................................... 113
FSCM. See Fail-Safe Clock Monitor.
G
GOTO .............................................................................. 396
H
Hardware Multiplier .......................................................... 127
Introduction .............................................................. 127
Operation ................................................................. 127
Performance Comparison ........................................ 127
I
I/O Ports ........................................................................... 145
Pin Capabilities ........................................................ 145
I²C Mode (MSSP) ............................................................ 279
Acknowledge Sequence Timing .............................. 307
Associated Registers ............................................... 313
Baud Rate Generator .............................................. 300
Bus Collision
During a Repeated Start Condition .................. 311
During a Start Condition .................................. 309
During a Stop Condition .................................. 312
Clock Arbitration ...................................................... 301
Clock Rate w/BRG ................................................... 300
Clock Stretching ....................................................... 293
10-Bit Slave Receive Mode (SEN = 1) ............ 293
10-Bit Slave Transmit Mode ............................ 293
7-Bit Slave Receive Mode (SEN = 1) .............. 293
7-Bit Slave Transmit Mode .............................. 293
Clock Synchronization and the CKP Bit ................... 294
Effects of a Reset .................................................... 308
General Call Address Support ................................. 297
DS39762F-page 480
 2011 Microchip Technology Inc.