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PIC18F97J60_11 Datasheet, PDF (73/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet
PIC18F97J60 FAMILY
TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Reset,
WDT Reset,
RESET Instruction,
Stack Resets,
CM Reset
Wake-up via WDT
or Interrupt
CCP4CON PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
--00 0000
--00 0000
--uu uuuu
CCPR5H
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR5L
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP5CON PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
--00 0000
--00 0000
--uu uuuu
SPBRG2
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
RCREG2
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
TXREG2
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
TXSTA2
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0010
0000 0010
uuuu uuuu
RCSTA2
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 000x
0000 000x
uuuu uuuu
ECCP3AS PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
ECCP3DEL PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
ECCP2AS PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
ECCP2DEL PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
SSP2BUF PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
xxxx xxxx
uuuu uuuu
uuuu uuuu
SSP2ADD PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
SSP2STAT PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
SSP2CON1 PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
SSP2CON2 PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
EDATA
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
xxxx xxxx
uuuu uuuu
uuuu uuuu
EIR
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
-000 0-00
-000 0-00
-uuu u-uu
ECON2
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
100- ----
100- ----
uuu- ----
ESTAT
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
-0-0 -000
-0-0 -000
-u-u -uuu
EIE
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
-000 0-00
-000 0-00
-uuu u-uu
EDMACSH PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
EDMACSL PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
EDMADSTH PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
---0 0000
---0 0000
---u uuuu
EDMADSTL PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
EDMANDH PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
---0 0000
---0 0000
---u uuuu
EDMANDL PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
EDMASTH PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
---0 0000
---0 0000
---u uuuu
EDMASTL PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
ERXWRPTH PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
---0 0000
---0 0000
---u uuuu
ERXWRPTL PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
ERXRDPTH PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
---0 0101
---0 0101
---u uuuu
ERXRDPTL PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1010
1111 1010
uuuu uuuu
ERXNDH
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
---1 1111
---1 1111
---u uuuu
ERXNDL
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1111
1111 1111
uuuu uuuu
ERXSTH
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
---0 0101
---0 0101
---u uuuu
ERXSTL
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1010
1111 1010
uuuu uuuu
Legend:
Note 1:
2:
3:
4:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
See Table 5-1 for Reset value for specific condition.
 2011 Microchip Technology Inc.
DS39762F-page 73