PIC18F97J60_11 Datasheet, PDF (161/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
TABLE 11-13: PORTF FUNCTIONS
Pin Name
Function
TRIS
Setting
I/O
I/O
Type
Description
RF0/AN5⁽¹⁾ RF0⁽¹⁾
0
1
AN5⁽¹⁾
1
RF1/AN6/ RF1
0
C2OUT
1
AN6
1
C2OUT
0
RF2/AN7/ RF2
0
C1OUT
1
AN7
1
C1OUT
0
RF3/AN8
RF3
0
1
AN8
1
RF4/AN9
RF4
0
1
AN9
1
RF5/AN10/ RF5
0
CVREF
1
AN10
1
CVREF
x
RF6/AN11 RF6
0
1
AN11
1
O DIG LATF<0> data output; not affected by analog input.
I
ST PORTF<0> data input; disabled when analog input is enabled.
I ANA A/D Input Channel 5. Default configuration on POR.
O DIG LATF<1> data output; not affected by analog input.
I
ST PORTF<1> data input; disabled when analog input is enabled.
I ANA A/D Input Channel 6. Default configuration on POR.
O DIG Comparator 2 output; takes priority over port data.
O DIG LATF<2> data output; not affected by analog input.
I
ST PORTF<2> data input; disabled when analog input is enabled.
I ANA A/D Input Channel 7. Default configuration on POR.
O TTL Comparator 1 output; takes priority over port data.
O DIG LATF<3> data output; not affected by analog input.
I
ST PORTF<3> data input; disabled when analog input is enabled.
I ANA A/D Input Channel 8 and Comparator C2+ input. Default input configuration on POR;
not affected by analog output.
O DIG LATF<4> data output; not affected by analog input.
I
ST PORTF<4> data input; disabled when analog input is enabled.
I ANA A/D Input Channel 9 and Comparator C2- input. Default input configuration on POR;
does not affect digital output.
O DIG LATF<5> data output; not affected by analog input. Disabled when CVREF
output is enabled.
I
ST PORTF<5> data input; disabled when analog input is enabled. Disabled when CVREF
output is enabled.
I ANA A/D Input Channel 10 and Comparator C1+ input. Default input configuration on POR.
O ANA Comparator voltage reference output. Enabling this feature disables digital I/O.
O DIG LATF<6> data output; not affected by analog input.
I
ST PORTF<6> data input; disabled when analog input is enabled.
I ANA A/D Input Channel 11 and Comparator C1- input. Default input configuration on POR;
does not affect digital output.
RF7/SS1
RF7
0
O DIG LATF<7> data output.
1
I
ST PORTF<7> data input.
Legend:
Note 1:
SS1
1
I TTL Slave select input for MSSP1 module.
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Implemented on 100-pin devices only.
TABLE 11-14: SUMMARY OF REGISTERS ASSOCIATED WITH PORTF
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
PORTF
RF7
RF6
RF5
RF4
RF3
RF2
RF1
LATF
LATF7 LATF6 LATF5 LATF4 LATF3 LATF2 LATF1
TRISF
TRISF7 TRISF6 TRISF5 TRISF4 TRISF3 TRISF2 TRISF1
ADCON1
—
—
VCFG1 VCFG0 PCFG3 PCFG2 PCFG1
CMCON
C2OUT C1OUT C2INV C1INV
CIS
CM2
CM1
CVRCON CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTF.
Note 1: Implemented on 100-pin devices only.
Bit 0
RF0⁽¹⁾
LATF0⁽¹⁾
TRISF0⁽¹⁾
PCFG0
CM0
CVR0
Reset
Values
on Page:
72
72
71
70
70
70
 2011 Microchip Technology Inc.
DS39762F-page 161