PIC18F97J60_11 Datasheet, PDF (127/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
9.0 8 x 8 HARDWARE MULTIPLIER
9.1 Introduction
All PIC18 devices include an 8 x 8 hardware multiplier
as part of the ALU. The multiplier performs an unsigned
operation and yields a 16-bit result that is stored in the
product register pair, PRODH:PRODL. The multiplier’s
operation does not affect any flags in the STATUS
register.
Making multiplication a hardware operation allows it to
be completed in a single instruction cycle. This has the
advantages of higher computational throughput and
reduced code size for multiplication algorithms and
allows the PIC18 devices to be used in many applica-
tions previously reserved for digital signal processors.
A comparison of various hardware and software
multiply operations, along with the savings in memory
and execution time, is shown in Table 9-1.
9.2 Operation
Example 9-1 shows the instruction sequence for an 8 x 8
unsigned multiplication. Only one instruction is required
when one of the arguments is already loaded in the
WREG register.
Example 9-2 shows the sequence to do an 8 x 8 signed
multiplication. To account for the sign bits of the argu-
ments, each argument’s Most Significant bit (MSb) is
tested and the appropriate subtractions are done.
EXAMPLE 9-1:
MOVF ARG1, W
MULWF ARG2
8 x 8 UNSIGNED
MULTIPLY ROUTINE
;
; ARG1 * ARG2 ->
; PRODH:PRODL
EXAMPLE 9-2:
MOVF ARG1, W
MULWF ARG2
BTFSC ARG2, SB
SUBWF PRODH, F
MOVF
BTFSC
SUBWF
ARG2, W
ARG1, SB
PRODH, F
8 x 8 SIGNED MULTIPLY
ROUTINE
; ARG1 * ARG2 ->
; PRODH:PRODL
; Test Sign Bit
; PRODH = PRODH
;
- ARG1
; Test Sign Bit
; PRODH = PRODH
;
- ARG2
TABLE 9-1: PERFORMANCE COMPARISON FOR VARIOUS MULTIPLY OPERATIONS
Routine
Multiply Method
Program
Memory
(Words)
Cycles
(Max)
Time
@ 40 MHz @ 10 MHz @ 4 MHz
8 x 8 unsigned
Without hardware multiply
Hardware multiply
13
1
8 x 8 signed
Without hardware multiply
Hardware multiply
33
6
16 x 16 unsigned
Without hardware multiply
Hardware multiply
21
28
16 x 16 signed
Without hardware multiply
Hardware multiply
52
35
69
6.9 s
27.6 s
69 s
1
100 ns
400 ns
1 s
91
9.1 s
36.4 s
91 s
6
600 ns
2.4 s
6 s
242
24.2 s
96.8 s
242 s
28
2.8 s
11.2 s
28 s
254
25.4 s 102.6 s 254 s
40
4.0 s
16.0 s
40 s
 2011 Microchip Technology Inc.
DS39762F-page 127